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path: root/drivers/gpu/drm/msm/adreno
AgeCommit message (Expand)AuthorFilesLines
2017-02-06drm/msm: let gpu wire up it's own fault handlerRob Clark1-0/+17
2017-02-06drm/msm: drop quirks bindingRob Clark4-20/+7
2017-02-06drm/msm: drop qcom,chipidRob Clark1-1/+39
2017-02-06drm/msm: remove qcom,gpu-pwrlevels bindingsRob Clark1-2/+4
2017-01-13drm/msm: fix potential null ptr issue in non-iommu caseRob Clark1-3/+2
2016-12-29drm/msm: Ensure that the hardware write pointer is validJordan Crouse1-1/+8
2016-11-28drm/msm: gpu: Add support for the GPMUJordan Crouse5-3/+430
2016-11-28drm/msm: gpu: Add A5XX target supportJordan Crouse5-5/+933
2016-11-28drm/msm: Disable interrupts during initJordan Crouse2-0/+7
2016-11-28drm/msm: gpu: Add OUT_TYPE4 and OUT_TYPE7Jordan Crouse1-0/+30
2016-11-28drm/msm: Add adreno_gpu_write64()Jordan Crouse4-5/+34
2016-11-28drm/msm: gpu Add new gpu register read/write functionsJordan Crouse1-10/+2
2016-11-28drm/msm: gpu: Return error on hw_init failureJordan Crouse4-25/+29
2016-11-28drm/msm: gpu: Cut down the list of "generic" registers to the ones we useJordan Crouse3-215/+0
2016-11-28drm/msm: update generated headersRob Clark6-96/+4158
2016-11-28drm/msm/adreno: move scratch register dumping to per-gen codeRob Clark3-6/+14
2016-11-28drm/msm: convert iova to 64bRob Clark1-1/+1
2016-11-27drm/msm: support multiple address spacesRob Clark3-3/+3
2016-10-24drm/msm/adreno: move function declarations to header fileBaoyou Xie2-3/+3
2016-07-16drm/msm: deal with arbitrary # of cmd buffersRob Clark1-9/+2
2016-07-16drm/msm: change gem->vmap() to get/putRob Clark1-1/+5
2016-06-04drm/msm: deal with exhausted vmap space betterRob Clark1-1/+1
2016-05-08drm/msm: drop return from gpu->submit()Rob Clark2-4/+2
2016-05-08drm/msm: fix ->last_fence() after recoverRob Clark1-2/+2
2016-05-08drm/msm: 'struct fence' conversionRob Clark1-2/+2
2016-05-08drm/msm: introduce msm_fence_contextRob Clark1-3/+3
2016-03-03drm/msm/adreno: remove duplicate adreno_hw_init() callRob Clark1-6/+0
2016-03-03drm/msm: add timestamp paramRob Clark3-0/+28
2016-03-03drm/msm/adreno: print details in case of a protect fault interruptCraig Stout1-0/+7
2016-03-03drm/msm/adreno: get CP_RPTR from register instead of shadow memoryCraig Stout1-12/+22
2016-03-03drm/msm/adreno: add adreno430 power controlCraig Stout1-2/+37
2016-03-03drm/msm/adreno: support for adreno 430.Craig Stout4-7/+52
2016-03-03drm/msm: update generated headersRob Clark5-145/+1704
2016-02-10drm/msm: add max-freq gpu param to uapiRob Clark1-0/+3
2015-12-14drm/msm/adreno: Remove CONFIG_OF checksArchit Taneja1-52/+0
2015-10-22drm/msm: update generated headersRob Clark5-22/+51
2015-08-16drm/msm: update generated headersRob Clark5-45/+248
2015-06-11drm/msm: workaround for missing irq on a306/8x16Rob Clark1-0/+11
2015-06-11drm/msm: adreno a306 supportRob Clark3-3/+23
2015-06-11drm/msm: clarify downstream bus scalingRob Clark3-4/+4
2015-06-11drm/msm: update generated headersRob Clark5-58/+573
2015-06-11drm/msm/adreno: dump scratch regs and other info on hangRob Clark4-3/+25
2015-05-15drm/msm: fix locking inconsistencies in gpu->destroy()Rob Clark1-1/+1
2015-02-01drm/msm: update generated headersRob Clark5-265/+456
2014-12-17drm/msm: Deletion of unnecessary checks before the function call "release_fir...Markus Elfring1-4/+2
2014-11-16drm/msm: a4xx support for msm-drmAravind Ganesan5-1/+662
2014-11-16drm/msm: Handle register offset differences between a3xx and a4xxAravind Ganesan3-6/+218
2014-11-16drm/msm: update generated headersRob Clark5-79/+2430
2014-11-16drm/msm/adreno: slight init order cleanupRob Clark1-6/+6
2014-09-10drm/msm/adreno: push dump/show stuff to base classRob Clark3-35/+39
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