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path: root/drivers/gpu/drm/i915/intel_fifo_underrun.c
AgeCommit message (Expand)AuthorFilesLines
2019-06-17drm/i915: move modesetting core code under display/Jani Nikula1-458/+0
2019-04-30drm/i915: extract intel_fifo_underrun.h from intel_drv.hJani Nikula1-0/+1
2019-04-08drm/i915: extract intel_fbc.h from intel_drv.hJani Nikula1-0/+1
2019-02-05drm/i915: Rename HAS_GMCHRodrigo Vivi1-3/+3
2019-01-17drm/i915: small isolated c99 types to kernel types switchJani Nikula1-6/+6
2018-12-13drm/i915: merge gen checks to use rangeLucas De Marchi1-1/+1
2018-12-13drm/i915: replace IS_GEN<N> with IS_GEN(..., N)Lucas De Marchi1-3/+3
2017-09-25drm/i915: Don't rmw PIPESTAT enable bitsVille Syrjälä1-6/+8
2017-09-01drm/i915: Fix enum pipe vs. enum transcoder for the PCH transcoderVille Syrjälä1-10/+10
2017-07-18drm/i915: Consistently use enum pipe for PCH transcodersMatthias Kaehlcke1-3/+3
2017-06-12drm/i915/cnl: Enable fifo underrun for Cannonlake.Rodrigo Vivi1-1/+1
2017-03-03drm/i915: Add FIFO underrun tracepointsVille Syrjälä1-2/+9
2017-03-02drm/i915: s/assert_spin_locked/lockdep_assert_held/Chris Wilson1-7/+7
2016-11-01drm/i915: Always use intel_get_crtc_for_pipe()Ville Syrjälä1-5/+6
2016-11-01drm/i915: Store struct intel_crtc * in {pipe,plane}_to_crtc_mapping[]Ville Syrjälä1-12/+10
2016-10-14drm/i915: Make IS_GEN macros only take dev_privTvrtko Ursulin1-3/+3
2016-10-14drm/i915: Make HAS_GMCH_DISPLAY only take dev_privTvrtko Ursulin1-1/+1
2016-09-22drm/i915/fbc: disable FBC on FIFO underrunsPaulo Zanoni1-0/+2
2016-07-05drm/i915: Convert dev_priv->dev backpointers to dev_priv->drmChris Wilson1-5/+7
2016-07-04drm/i915: Mass convert dev->dev_private to to_i915(dev)Chris Wilson1-9/+9
2016-04-07drm/i915: Do not use {HAS_*, IS_*, INTEL_INFO}(dev_priv->dev)Joonas Lahtinen1-2/+2
2016-03-16drm/i915: make transcoder_name return a stringJani Nikula1-3/+3
2015-11-26drm/i915: Introduce bdw_{update,enable,disable}_pipe_irq()Ville Syrjälä1-6/+2
2015-11-26drm/i915: Make ironlake_{enable,disable}_display_irq() static inlinesVille Syrjälä1-4/+4
2015-11-18drm/i915: Type safe register read/writeVille Syrjälä1-2/+2
2015-11-10drm/i915: Check for FIFO underruns after modeset on IVB/HSW and CPT/PPTVille Syrjälä1-27/+98
2015-03-04drm/i915: Check for driver readyness before handling an underrun interruptChris Wilson1-11/+7
2015-01-27drivers: gpu: drm: i915: intel_fifo_underrun.c: Fix a typo in commentKumar Amit Mehta1-1/+1
2014-10-24drm/i915: kerneldoc for intel_fifo_underrun.cDaniel Vetter1-17/+65
2014-10-24drm/i915: Filter gmch fifo underruns in the shared handlerDaniel Vetter1-2/+8
2014-10-24drm/i915: Add wrappers to handle fifo underrun interruptsDaniel Vetter1-0/+17
2014-10-24drm/i915: Use dev_priv in public intel_fifo_underrun.c functionsDaniel Vetter1-13/+12
2014-10-24drm/i915: Extract intel_fifo_underrun.cDaniel Vetter1-0/+311
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