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path: root/drivers/gpu/drm/i915/intel_ddi.c
AgeCommit message (Expand)AuthorFilesLines
2016-07-04drm/i915: Mass convert dev->dev_private to to_i915(dev)Chris Wilson1-18/+18
2016-06-30drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()Chris Wilson1-1/+4
2016-06-13drm/i915/bxt: Sanitiy check the PHY lane power down statusImre Deak1-0/+25
2016-06-13drm/i915/bxt: Rename broxton to bxt in PHY/CDCLK function prefixesImre Deak1-7/+6
2016-06-13drm/i915/bxt: Set DDI PHY lane latency optimization during modesetImre Deak1-43/+80
2016-06-13drm/i915/bxt: Move DDI PHY enabling/disabling to the power well codeImre Deak1-37/+9
2016-06-13drm/i915/bxt: Wait for PHY1 GRC calibration synchronouslyImre Deak1-12/+3
2016-05-30drm/i915: Give encoders useful namesVille Syrjälä1-1/+1
2016-05-13drm/i915: Remove intel_clock_t typedefAnder Conselvan de Oliveira1-1/+1
2016-05-09drm/i915: Enable/disable TMDS output buffers in DP++ adaptor as neededVille Syrjälä1-0/+12
2016-05-03Revert "drm/i915: start adding dp mst audio"Lyude1-19/+5
2016-04-29drm/i915: Set crtc_state->lane_count for HDMIAnder Conselvan de Oliveira1-1/+3
2016-04-22drm/i915/bxt: Force reprogramming a PHY with invalid HW stateImre Deak1-5/+14
2016-04-22drm/i915/bxt: Wait for PHY1 GRC done if PHY0 was already enabledImre Deak1-3/+18
2016-04-22drm/i915/bxt: Use PHY0 GRC value for HW state verificationImre Deak1-1/+1
2016-04-20drm/i915: Fix eDP low vswing for BroadwellMika Kahola1-2/+10
2016-04-19drm/i915/ddi: Fix eDP VDD handling during booting and suspend/resumeImre Deak1-7/+3
2016-04-15drm/i915/bxt: Add HW state verification for DDI PHY and CDCLKImre Deak1-2/+122
2016-04-15drm/i915/bxt: Don't reprogram an already enabled DDI PHYImre Deak1-0/+40
2016-04-15drm/i915/bxt: Power down DDI PHYs separately during the per PHY uninitImre Deak1-3/+4
2016-04-15drm/i915/bxt: Pass drm_i915_private to DDI PHY, CDCLK helpersImre Deak1-6/+4
2016-04-15drm/i915/bxt: Add a note about BXT_PORT_CL1CM_DW30 being read-onlyImre Deak1-0/+3
2016-04-04drm/i915/ddi: Silence compiler warning for unknown output typeChris Wilson1-3/+3
2016-04-01drm/i915: Disable FDI RX before DDI_BUF_CTLVille Syrjälä1-6/+12
2016-04-01drm/i915: use for_each_port_masked in bxt phy init for clarityJani Nikula1-3/+7
2016-04-01drm/i915: BXT DDI PHY sequence BUNVandana Kannan1-2/+11
2016-03-29drm/i915: move edp low vswing config to vbt dataJani Nikula1-2/+2
2016-03-29drm/i915: use a substruct in vbt data for edpJani Nikula1-4/+4
2016-03-21drm/i915/bxt: add dsi transcodersJani Nikula1-0/+6
2016-03-09drm/i915: Make SKL/KBL DPLL0 managed by the shared dpll codeAnder Conselvan de Oliveira1-21/+0
2016-03-09drm/i915: Manage HSW/BDW LCPLLs with the shared dpll interfaceAnder Conselvan de Oliveira1-11/+7
2016-03-09drm/i915: Move BXT pll configuration logic to intel_dpll_mgr.cAnder Conselvan de Oliveira1-140/+1
2016-03-09drm/i915: Move SKL/KLB pll selection logic to intel_dpll_mgr.cAnder Conselvan de Oliveira1-300/+1
2016-03-09drm/i915: Move HSW/BDW pll selection logic to intel_dpll_mgr.cAnder Conselvan de Oliveira1-260/+11
2016-03-09drm/i915: Store a direct pointer to shared dpll in intel_crtc_stateAnder Conselvan de Oliveira1-1/+3
2016-03-09drm/i915: Move ddi shared dpll code to intel_dpll_mgr.cAnder Conselvan de Oliveira1-472/+0
2016-03-07drm/i915: Fix bogus dig_port_map[] assignment for pre-HSWTakashi Iwai1-1/+0
2016-02-17drm/i915/ddi: Ensure the HW is powered during HW state readoutImre Deak1-33/+79
2016-02-09drm/i915/skl: Explicitly check for eDP in skl_ddi_pll_select()Lyude1-1/+3
2016-02-09drm/i915/skl: Don't skip mst encoders in skl_ddi_pll_select()Lyude1-1/+2
2016-02-03drm/i915: Check DDI max lanes after applying BXT workaroundMatt Roper1-1/+3
2016-01-18Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queuedDaniel Vetter1-1/+1
2016-01-12drm/i915: Only complain about n_edp_entries with eDP portsVille Syrjälä1-2/+3
2016-01-12drm/i915: Kill intel_prepare_ddi()Ville Syrjälä1-71/+28
2016-01-12drm/i915: Reject >9 ddi translation entried if port != A/E on SKLVille Syrjälä1-0/+9
2016-01-12drm/i915: Pass around dev_priv for ddi buffer programmingVille Syrjälä1-42/+37
2016-01-12drm/i915: Eliminate duplicated skl_get_buf_trans_dp()Ville Syrjälä1-16/+5
2016-01-12drm/i915: Remove pointless 'ddi_translations' local variableVille Syrjälä1-28/+16
2016-01-12drm/i915: Store max lane count in intel_digital_portVille Syrjälä1-9/+1
2016-01-12drm/i915: Check max number of lanes when registering DDI portsVille Syrjälä1-0/+36
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