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path: root/drivers/gpu/drm/i915/i915_suspend.c
AgeCommit message (Expand)AuthorFilesLines
2013-06-16drm/i915: Restore fences after resume and GPU resetsChris Wilson1-0/+1
2013-03-18drm/i915: don't save/restore PCH_LVDS on LPTPaulo Zanoni1-3/+4
2013-02-20drm/i915: don't restore LVDS enable state blindly v2Jesse Barnes1-2/+6
2013-01-31drm/i915: Introduce i915_vgacntrl_reg()Ville Syrjälä1-8/+2
2013-01-31drm/i915: move DP save/restore into i915_ums.cDaniel Vetter1-28/+1
2013-01-31drm/i915: dont save/restore VGA state for kmsDaniel Vetter1-22/+26
2013-01-31drm/i915: extract ums suspend/resume into i915_ums.cDaniel Vetter1-449/+2
2013-01-29drm/i915: move modeset checks out of save/restore_modeset_regDaniel Vetter1-23/+15
2013-01-24drm/i915: don't save/restore DSPARB on gen5+Paulo Zanoni1-2/+4
2012-11-21drm/i915: Remove save/restore of physical HWS_PGA registerChris Wilson1-8/+0
2012-11-12drm/i915: move the suspend/resume register file out of dev_privDaniel Vetter1-346/+346
2012-10-22Merge tag 'v3.7-rc2' into drm-intel-next-queuedDaniel Vetter1-3/+2
2012-10-18drm/i915: don't save/restor ADPA for kmsDaniel Vetter1-13/+12
2012-10-18drm/i915: don't save/restore HWS_PGA reg for kmsDaniel Vetter1-2/+4
2012-10-18drm/i915: don't save/restore irq regs for kmsDaniel Vetter1-26/+30
2012-10-18drm/i915: don't save/restore DP regs for kmsDaniel Vetter1-31/+37
2012-10-02UAPI: (Scripted) Convert #include "..." to #include <path/...> in drivers/gpu/David Howells1-2/+2
2012-10-02UAPI: (Scripted) Remove redundant DRM UAPI header #inclusions from drivers/gpu/.David Howells1-1/+0
2012-07-20Merge tag 'v3.5-rc7' into drm-nextDave Airlie1-1/+4
2012-06-25drm/i915: wrap up gt powersave enabling functionsDaniel Vetter1-4/+1
2012-06-23drm/i915: Fix eDP blank screen after S3 resume on HP desktopsTakashi Iwai1-1/+4
2012-05-20drm/i915: gen6_enable_rps() wants to be called after ring initialisationChris Wilson1-6/+0
2012-05-03drm/i915: manage PCH PLLs separately from pipesJesse Barnes1-1/+1
2012-04-12drm/i915: re-init modeset hw state after gpu resetDaniel Vetter1-11/+1
2012-01-25drm/i915: Re-enable gen7 RC6 and GPU turbo after resume.Eric Anholt1-2/+2
2012-01-10drm/i915: handle 3rd pipeEugeni Dodonov1-0/+4
2012-01-10drm/i915: simplify pipe checkingEugeni Dodonov1-1/+2
2011-11-03drm/i915: Ivybridge still has fences!Daniel Vetter1-0/+2
2011-09-20Drivers: i915: Fix all space related issues.Akshay Joshi1-4/+4
2011-08-15drm/i915: Cannot set clock gating under UMSKeith Packard1-1/+2
2011-07-30Merge branch 'drm-intel-fixes' into drm-intel-nextKeith Packard1-0/+2
2011-07-30drm/i915/pch: Save/restore PCH_PORT_HOTPLUG across suspendAdam Jackson1-0/+2
2011-07-08drm/i915: Only export the generic intel_disable_fbc() interfaceChris Wilson1-3/+1
2011-06-30Merge branch 'drm-intel-fixes' into drm-intel-nextKeith Packard1-6/+13
2011-06-29drm/i915: Hold struct_mutex during i915_save_state/i915_restore_stateKeith Packard1-6/+13
2011-06-29drm/i915: load a ring frequency scaling table v3Jesse Barnes1-1/+3
2011-06-22drm/i915: save/resume forcewake lock fixesBen Widawsky1-0/+5
2011-05-14drm/i915: split PCH clock gating initJesse Barnes1-2/+1
2011-05-14drm/i915: split clock gating init into per-chipset functionsJesse Barnes1-1/+1
2011-03-24Revert "drm/i915: Don't save/restore hardware status page address register"Chris Wilson1-0/+6
2011-03-02drm/i915: Don't save/restore hardware status page address registerZhenyu Wang1-6/+0
2011-02-08drm/i915: cleanup per-pipe reg usageJesse Barnes1-215/+214
2011-01-11drm/i915: cleanup rc6 codeJesse Barnes1-4/+3
2011-01-11drm/i915: fix rc6 enabling around suspend/resumeJesse Barnes1-3/+0
2011-01-11drm/i915: re-enable rc6 support for Ironlake+Jesse Barnes1-2/+2
2010-12-20drm/i915: Undo "Uncouple render/power ctx before suspending"Chris Wilson1-0/+2
2010-12-18drm/i915: dynamic render p-state support for Sandy BridgeJesse Barnes1-2/+7
2010-12-06drm/i915: Uncouple render/power ctx before suspendingChris Wilson1-1/+3
2010-11-25drm/i915: Only save and restore fences for UMSChris Wilson1-43/+46
2010-11-21drm/i915: Only save/restore cursor regs if !KMSChris Wilson1-20/+20
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