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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)AuthorFilesLines
2015-01-28drm/i915/skl: Enabling PSR on SkylakeSonika Jindal1-0/+5
2015-01-27drm/i915/skl: Gen9 coarse power gatingZhe Wang1-0/+3
2015-01-27drm/i915: New offset for reading frequencies on CHV.Deepak S1-0/+9
2015-01-27drm/i915/chv: Populate total EU count on CherryviewDeepak S1-0/+11
2015-01-13drm/i915: Improve HiZ throughput on Cherryview.Kenneth Graunke1-0/+3
2015-01-13Merge tag 'topic/i915-hda-componentized-2015-01-12' into drm-intel-next-queuedDaniel Vetter1-3/+18
2015-01-06drm/i915: Make sample_c messages go faster on Haswell.Kenneth Graunke1-0/+1
2014-12-16drm/i915: Disable PSMI sleep messages on all rings around context switchesChris Wilson1-0/+2
2014-12-16drm/i915: Invalidate media caches on gen7Chris Wilson1-0/+1
2014-12-16drm/i915: Add GPGPU_THREADS_DISPATCHED to the register whitelistJordan Justen1-11/+12
2014-12-11drm/i915: save/restore GMBUS freq across suspend/resume on gen4Jesse Barnes1-0/+1
2014-12-10drm/i915: Engage the DP scramble reset for pipe C on CHVVille Syrjälä1-1/+2
2014-12-10drm/i915: Add MI_SET_APPID cmd to cmd parser tablesMichael H. Nguyen1-0/+3
2014-12-10drm/i915/bdw: Fix the write setting up the WIZ hashing modeDamien Lespiau1-3/+14
2014-12-05drm/i915: Pixel Clock changes for DSI dual linkGaurav K Singh1-0/+4
2014-12-05drm/i915: Add support for port enable/disable for dual link configurationGaurav K Singh1-0/+1
2014-12-05drm/i915: s/MI_STORE_DWORD_IMM_GEN8/MI_STORE_DWORD_IMM_GEN4/Ville Syrjälä1-2/+3
2014-12-03drm/i915/dsi: clean up MIPI DSI pipe vs. port usageJani Nikula1-150/+153
2014-12-03drm/i915: Add PSR registers for PSR VLV/CHV.Rodrigo Vivi1-0/+36
2014-12-03drm/i915: Implement GPU reset for 915/945Ville Syrjälä1-1/+1
2014-12-03drm/i915: Fix gen4 GPU resetVille Syrjälä1-0/+1
2014-11-20drm/i915: Pin tiled objects for L-shaped configsDaniel Vetter1-0/+2
2014-11-20drm/i915: Use efficient frequency for HSW/BDWTom O'Rourke1-0/+1
2014-11-17drm/i915: Drop the HSW special case from __gen6_gt_wait_for_thread_c0()Ville Syrjälä1-1/+0
2014-11-17drm/i915: Add a name for the Punit GPLLENABLE bitVille Syrjälä1-0/+1
2014-11-14drm/i915: Clear PCODE_DATA1 on SNB+Damien Lespiau1-1/+1
2014-11-14drm/i915/skl: AUX irqs have movedJesse Barnes1-0/+3
2014-11-14drm/i915/skl: fetch, enable/disable pfit as needed v2Jesse Barnes1-0/+12
2014-11-14drm/i915/skl: Implement queue_flipDamien Lespiau1-0/+10
2014-11-14drm/i915/skl: Determine enabled PLL and its linkrate/pixel clockSatheeshakrishna M1-0/+5
2014-11-14drm/i915/skl: Register definitions for SKL ClocksSatheeshakrishna M1-0/+72
2014-11-14drm/i915: Add the predicate source registers to the register whitelistNeil Roberts1-0/+2
2014-11-14drm/i915/chv: Add new workarounds for chvArun Siluvery1-0/+1
2014-11-10Merge remote-tracking branch 'airlied/drm-next' into HEADDaniel Vetter1-1/+1
2014-11-07drm/i915: make pipe/port based audio valid accessors easier to useJani Nikula1-14/+6
2014-11-07drm/i915/skl: Gen9 ForcewakeZhe Wang1-0/+6
2014-11-07drm/i915/skl: Program the DDB allocationDamien Lespiau1-0/+16
2014-11-07drm/i915/skl: Register definitions and macros for SKL Watermark regsPradeep Bhat1-0/+35
2014-11-07drm/i915/skl: Read the Memory Latency Values for WM computationPradeep Bhat1-0/+7
2014-11-07drm/i915: clean up and clarify audio related register definesJani Nikula1-82/+83
2014-11-07Merge tag 'topic/core-stuff-2014-11-05' of git://anongit.freedesktop.org/drm-...Dave Airlie1-1/+1
2014-11-05drm/i915: Add support for CHV pipe B sprite CSCVille Syrjälä1-0/+33
2014-11-05drm/i915: Initialize new chv primary plane and pipe blender registersVille Syrjälä1-1/+24
2014-10-24drm/i915: Add rotation support for cursor plane (v5)Ville Syrjälä1-0/+1
2014-10-24drm/i915/chv: Use 16 and 32 for low and high drain latency precision.Rodrigo Vivi1-6/+7
2014-10-24drm/i915: Fix chv PCS DW11 register definesVille Syrjälä1-2/+2
2014-10-24drm/i915/skl: Add 180 degree HW rotation supportSonika Jindal1-0/+3
2014-10-21Merge branch 'drm-intel-next-fixes' into drm-intel-nextDaniel Vetter1-4/+3
2014-10-21gpu:drm: Fix typo in Documentation/DocBook/drm.xmlMasanari Iida1-1/+1
2014-10-03drm/i915: Clear TX FIFO reset master override bits on chvVille Syrjälä1-0/+12
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