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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)AuthorFilesLines
2023-03-20drm/i915/mtl: Disable MC6 for MTL A stepBadal Nilawar1-9/+0
2023-03-20drm/i915/mtl: Fix Wa_16015201720 implementationRadhakrishna Sripada1-3/+5
2023-02-02Merge tag 'drm-intel-gt-next-2023-02-01' of git://anongit.freedesktop.org/drm...Dave Airlie1-4/+0
2023-01-25Merge drm/drm-next into drm-intel-nextJani Nikula1-0/+3
2023-01-24Merge drm/drm-next into drm-intel-gt-nextTvrtko Ursulin1-61/+40
2023-01-24Merge tag 'drm-intel-gt-next-2023-01-18' of git://anongit.freedesktop.org/drm...Daniel Vetter1-0/+3
2023-01-18drm/i915: Move/adjust register definitions related to Wa_22011450934Matt Roper1-4/+0
2023-01-17drm/i915/psr: Implement Wa_14015648006Jouni Högander1-0/+1
2023-01-13drm/i915/dsb: Stop with the RMWVille Syrjälä1-1/+1
2023-01-02Merge drm/drm-next into drm-intel-nextJani Nikula1-0/+10
2022-12-30Merge drm/drm-next into drm-intel-gt-nextRodrigo Vivi1-99/+32
2022-12-20drm/i915/dsi: add support for ICL+ native MIPI GPIO sequenceJani Nikula1-0/+1
2022-12-13drm/i915: Document LUT "max" register precisionVille Syrjälä1-5/+5
2022-12-13drm/i915: Clean up various indexed LUT registersVille Syrjälä1-8/+10
2022-12-13drm/i915: Define skl+ palette anti-collision bitVille Syrjälä1-0/+1
2022-12-13drm/i915: Clean up GAMMA_MODE definesVille Syrjälä1-8/+8
2022-12-13drm/i915: Shorten GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED a bitVille Syrjälä1-1/+1
2022-12-09drm/i915: Reject unusable power sequencersVille Syrjälä1-0/+1
2022-12-09drm/i915/gsc: Do a driver-FLR on unload if GSC was loadedDaniele Ceraolo Spurio1-0/+3
2022-11-23drm/i915/dvo: Extract intel_dvo_regs.hVille Syrjälä1-44/+0
2022-11-23drm/i915/dvo: Use REG_BIT() & co. for DVO registersVille Syrjälä1-30/+33
2022-11-23drm/i915/dvo: Rename the "active data order" bitsVille Syrjälä1-4/+4
2022-11-23drm/i915/dvo: Define a few more DVO register bitsVille Syrjälä1-1/+3
2022-11-23drm/i915/dvo: Parametrize DVO/DVO_SRCDIM registersVille Syrjälä1-6/+5
2022-11-23Merge tag 'drm-intel-next-2022-11-18' of git://anongit.freedesktop.org/drm/dr...Dave Airlie1-99/+32
2022-11-22drm/i915: Add 10bit gamma mode for gen2/3Ville Syrjälä1-0/+14
2022-11-17drm/i915: Clean up chv CGM (de)gamma definesVille Syrjälä1-6/+10
2022-11-17drm/i915: Clean up 12.4bit precision palette definesVille Syrjälä1-6/+9
2022-11-17drm/i915: Clean up 10bit precision palette definesVille Syrjälä1-6/+5
2022-11-17drm/i915: Clean up legacy palette definesVille Syrjälä1-6/+5
2022-11-17drm/i915/hti: abstract hti handlingJani Nikula1-5/+0
2022-11-14Merge drm/drm-next into drm-intel-nextRodrigo Vivi1-8/+30
2022-11-14drm/i915/mtl: Add Wa_14017073508 for SAMediaBadal Nilawar1-0/+9
2022-11-11drm/i915: split out intel_display_reg_defs.hJani Nikula1-41/+1
2022-11-11drm/i915/reg: move pick even and pick to reg defsJani Nikula1-15/+0
2022-11-11drm/i915/reg: move masked field helpers to i915_reg_defs.hJani Nikula1-13/+0
2022-11-07drm/i915/mtl: add initial definitions for GSC CSDaniele Ceraolo Spurio1-0/+1
2022-11-04Merge tag 'drm-intel-gt-next-2022-11-03' of git://anongit.freedesktop.org/drm...Dave Airlie1-0/+22
2022-11-03drm/i915: Use _MMIO_PIPE() for SKL_BOTTOM_COLORVille Syrjälä1-1/+2
2022-11-01Merge tag 'drm-intel-next-2022-10-28' of git://anongit.freedesktop.org/drm/dr...Dave Airlie1-176/+12
2022-10-26drm/i915/tgl+: Move DKL PHY register definitions to intel_dkl_phy_regs.hImre Deak1-179/+0
2022-10-26drm/i915/tgl+: Add locking around DKL PHY register accessesImre Deak1-0/+3
2022-10-17drm/i915/hwmon: Expose card reactive critical powerAshutosh Dixit1-0/+6
2022-10-04drm/i915/mtl: Extend PSR supportJosé Roberto de Souza1-0/+5
2022-10-03drm/i915/psr: Fix PSR_IMR/IIR field handlingJouni Högander1-4/+12
2022-10-03Merge drm/drm-next into drm-intel-gt-nextTvrtko Ursulin1-626/+113
2022-10-03drm/i915/psr: Fix PSR_IMR/IIR field handlingJouni Högander1-4/+12
2022-09-30drm/i915/mtl: enable local stolen memoryAravind Iddamsetty1-0/+4
2022-09-24drm/i915: Read graphics/media/display arch version from hwMatt Roper1-0/+7
2022-09-22drm/i915: Add missing mask when reading GEN12_DSMBASELucas De Marchi1-0/+1
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