summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/i915_gpu_error.c
AgeCommit message (Expand)AuthorFilesLines
2014-08-14drm/i915: Print captured bo for all VM in error stateChris Wilson1-24/+56
2014-08-13drm/i915: Only track real ppgtt for a contextDaniel Vetter1-3/+7
2014-08-07drm/i915: Fix DEIER and GTIER collecting for BDW.Rodrigo Vivi1-5/+14
2014-08-07drm/i915: Don't accumulate hangcheck score on forward progressMika Kuoppala1-0/+2
2014-08-07drm/i915: Collect gtier properly on HSW.Rodrigo Vivi1-10/+11
2014-08-07drm/i915: Fix error state collectingRodrigo Vivi1-1/+2
2014-07-23drm/i915: Fix possible overflow when recording semaphore states.Rodrigo Vivi1-7/+14
2014-07-23drm/i915/error: Check the potential ctx obj's vmBen Widawsky1-0/+3
2014-07-08drm/i915/bdw: collect semaphore error stateBen Widawsky1-4/+47
2014-07-08drm/i915: Extract semaphore error collectionBen Widawsky1-12/+18
2014-06-11drm/i95: Initialize active ring->pid to -1Chris Wilson1-1/+2
2014-05-23drm/i915: Split the ringbuffers from the rings (2/3)Oscar Mateo1-3/+3
2014-05-23drm/i915: s/intel_ring_buffer/intel_engine_csOscar Mateo1-3/+3
2014-05-16drm/i915: Introduce mapping of user pages into video memory (userptr) ioctlChris Wilson1-0/+2
2014-05-05drm/i915: Move semaphore specific ring members to structBen Widawsky1-3/+3
2014-05-05drm/i915: add missing error capturing of the PIPESTAT regImre Deak1-3/+0
2014-05-05drm/i915: gen2: move error capture of IER to its correct placeImre Deak1-4/+4
2014-05-05drm/i915:Initialize the second BSD ring on BDW GT3 machineZhao Yakui1-0/+1
2014-04-09drm/i915: Dump the whole context object.Ben Widawsky1-14/+2
2014-04-02drm/i915/bdw: Expand FADD to 64bitBen Widawsky1-2/+5
2014-03-31drm/i915: prefer struct drm_i915_private to drm_i915_private_tJani Nikula1-1/+1
2014-03-28drm/i915: Split 64bit hexadecimal addresses to make them easier to readChris Wilson1-2/+2
2014-03-28drm/i915: Broadwell expands ACTHD to 64bitChris Wilson1-1/+1
2014-03-18drm/i915: Actually capture PP_DIR_BASE on errorBen Widawsky1-2/+4
2014-03-11Merge tag 'v3.14-rc6' into drm-intel-next-queuedDaniel Vetter1-1/+4
2014-03-06drm/i915: Add suspend count to error stateMika Kuoppala1-0/+2
2014-03-06drm/i915: Add reset count to error stateMika Kuoppala1-0/+8
2014-03-06drm/i915: Add reason for capture in error stateMika Kuoppala1-6/+21
2014-03-06drm/i915: Add error code into error stateMika Kuoppala1-23/+38
2014-03-06drm/i915: Record pid/comm of hanging taskChris Wilson1-56/+80
2014-03-06drm/i915: Rely on accurate request tracking for finding hung batchesChris Wilson1-60/+12
2014-02-11drm/i915: Pair va_copy with va_end in i915_error_vprintfMika Kuoppala1-1/+4
2014-02-05drm/i915: Generate a hang error codeBen Widawsky1-7/+37
2014-01-30drm/i915: Don't access snooped pages through the GTT (even for error capture)Chris Wilson1-1/+2
2014-01-30drm/i915: Only print information for filing bug reports onceChris Wilson1-4/+8
2014-01-30drm/i915: Capture PPGTT info on error captureBen Widawsky1-0/+37
2014-01-30drm/i915: Add some more registers to error stateBen Widawsky1-1/+10
2014-01-30drm/i915: Move per ring error state to ring_errorBen Widawsky1-72/+71
2014-01-30drm/i915: Logically reorder error register captureBen Widawsky1-23/+36
2014-01-30drm/i915: Extract register state error captureBen Widawsky1-34/+43
2014-01-30Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queuedDaniel Vetter1-7/+15
2014-01-27drm/i915: Include HW status page in error captureChris Wilson1-0/+50
2014-01-27drm/i915: Decouple GPU error reporting from ring initialisationChris Wilson1-7/+15
2014-01-26Merge branch 'topic/ppgtt' into drm-intel-next-queuedDaniel Vetter1-16/+52
2013-12-18drm/i915: Use multiple VMs -- the point of no returnBen Widawsky1-5/+0
2013-12-18drm/i915: Make pin count per VMABen Widawsky1-3/+3
2013-12-18drm/i915: Identify active VM for batchbuffer captureBen Widawsky1-0/+33
2013-12-18drm/i915: Don't use gtt mapping for !gtt error objectsBen Widawsky1-1/+2
2013-12-18drm/i915: Add vm to error BO captureBen Widawsky1-7/+14
2013-12-12drm/i915: Record BB_ADDR for every ringVille Syrjälä1-6/+6