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path: root/drivers/gpu/drm/i915/gvt
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2025-04-25drm/i915/gvt: fix unterminated-string-initialization warningJani Nikula1-3/+4
2024-08-22Merge tag 'drm-misc-next-2024-08-16' of https://gitlab.freedesktop.org/drm/mi...Daniel Vetter1-5/+13
2024-08-14drm/i915/gvt: stop using drm_edid_block_valid()Jani Nikula1-5/+13
2024-08-08drm/i915: Replace double blank with single blank after commaAndi Shyti1-1/+1
2024-08-01Merge drm/drm-next into drm-intel-nextJani Nikula1-0/+1
2024-07-22drm/i915: Make I2C terminology more inclusiveEaswar Hariharan3-17/+17
2024-06-21Merge tag 'drm-intel-next-2024-06-19' of https://gitlab.freedesktop.org/drm/i...Dave Airlie6-134/+146
2024-06-19Merge drm/drm-next into drm-intel-nextJani Nikula5-20/+11
2024-06-14drm/i915/gvt: do not use implict dev_priv in DSPSURF_TO_PIPE()Jani Nikula1-2/+2
2024-06-14drm/i915/gvt: rename range variable to strideJani Nikula1-2/+2
2024-06-14drm/i915/gvt: use proper i915_reg_t for calc_index() parametersJani Nikula1-8/+10
2024-06-14drm/i915/gvt: remove the unused end parameter from calc_index()Jani Nikula1-9/+8
2024-06-10drm: add missing MODULE_DESCRIPTION() macrosJeff Johnson1-0/+1
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_DDI_FUNC_CTLJani Nikula2-12/+15
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_LINK_N1Jani Nikula2-3/+3
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_LINK_M1Jani Nikula2-3/+3
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_DATA_N1Jani Nikula1-2/+2
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_DATA_M1Jani Nikula1-4/+4
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_FLIPCOUNT_G4XJani Nikula2-3/+3
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_FRMCOUNT_G4XJani Nikula1-1/+1
2024-06-07drm/i915: pass dev_priv explicitly to TRANSCONFJani Nikula2-10/+14
2024-06-07drm/i915: pass dev_priv explicitly to PIPESRCJani Nikula1-3/+3
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_VTOTALJani Nikula1-1/+1
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_HTOTALJani Nikula1-1/+1
2024-05-31drm/i915/gvt: use proper macros for DP AUX CH CTL registersJani Nikula1-19/+16
2024-05-24drm/i915: pass dev_priv explicitly to DSPSURFLIVEJani Nikula1-2/+2
2024-05-24drm/i915: pass dev_priv explicitly to DSPTILEOFFJani Nikula1-1/+1
2024-05-24drm/i915: pass dev_priv explicitly to DSPSURFJani Nikula3-7/+7
2024-05-24drm/i915: pass dev_priv explicitly to DSPSTRIDEJani Nikula2-3/+3
2024-05-24drm/i915: pass dev_priv explicitly to DSPCNTRJani Nikula4-6/+6
2024-05-22Merge tag 'driver-core-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds1-20/+6
2024-05-22drm/i915: Extract i9xx_plane_regs.hVille Syrjälä4-0/+4
2024-05-19Merge tag 'mm-stable-2024-05-17-19-19' of git://git.kernel.org/pub/scm/linux/...Linus Torvalds5-0/+5
2024-05-16drm/i915: pass dev_priv explicitly to CURPOSJani Nikula1-1/+1
2024-05-16drm/i915: pass dev_priv explicitly to CURBASEJani Nikula1-1/+1
2024-05-16drm/i915: pass dev_priv explicitly to CURCNTRJani Nikula2-5/+5
2024-05-15drm/i915/gvt: Use the proper PLANE_AUX_OFFSET() defineVille Syrjälä2-16/+14
2024-05-15drm/i915/gvt: Use the proper PLANE_AUX_DIST() defineVille Syrjälä2-15/+14
2024-05-15drm/i915: Move skl+ wm/ddb registers to proper headersVille Syrjälä1-0/+1
2024-05-15drm/i915: Extract intel_cursor_regs.hVille Syrjälä2-0/+2
2024-05-15drm/i915: Extract skl_universal_plane_regs.hVille Syrjälä3-1/+4
2024-04-29drm/i915/display: split out intel_sprite_regs.h from i915_reg.hJani Nikula4-1/+7
2024-04-26fix missing vmalloc.h includesKent Overstreet5-0/+5
2024-04-19drm/i915/dpio: Extract bxt_dpio_phy_regs.hVille Syrjälä3-0/+3
2024-04-19drm/i915/dpio: Add per-lane PHY TX register definitons for bxt/glkVille Syrjälä1-3/+3
2024-04-11treewide: Use sysfs_bin_attr_simple_read() helperLukas Wunner1-20/+6
2024-02-28Merge tag 'drm-intel-next-2024-02-27-1' of git://anongit.freedesktop.org/drm/...Dave Airlie7-26/+0
2024-02-26Merge v6.8-rc6 into drm-nextDaniel Vetter1-2/+1
2024-02-19drm/i915: remove intel_gvt_irq::pending_eventsJiri Slaby (SUSE)1-1/+0
2024-02-19drm/i915: remove intel_gvt_event_info::policyJiri Slaby (SUSE)1-1/+0
generated by cgit v1.2.3 (git 2.39.0) at 2026-05-01 16:12:39 +0300