summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/gt/intel_lrc_reg.h
AgeCommit message (Expand)AuthorFilesLines
2022-01-12drm/i915/gt: Move engine registers to their own headerMatt Roper1-15/+0
2021-07-22drm/i915/guc: Implement GuC context operations for new intefaceMatthew Brost1-1/+0
2021-07-22drm/i915/xehp: Handle new device context ID formatStuart Summers1-0/+2
2021-03-24drm/i915/gt: Wrap macro arg in ()Chris Wilson1-1/+1
2021-03-24drm/i915/gt: SPDX cleanupChris Wilson1-2/+1
2020-12-21drm/i915/gt: Split logical ring contexts from execlist submissionChris Wilson1-0/+2
2020-12-10drm/i915/gt: Move move context layout registers and offsets to lrc_reg.hChris Wilson1-0/+39
2020-09-15drm/i915/gt: Use a mmio read of the CSB in case of failureChris Wilson1-0/+3
2020-04-24drm/i915/selftests: Add context batchbuffers registers to live_lrc_fixedMika Kuoppala1-5/+1
2020-02-16drm/i915: Track hw reported context runtimeTvrtko Ursulin1-0/+1
2019-11-02drm/i915/execlists: Verify context register state before executionChris Wilson1-2/+2
2019-09-24drm/i915/selftests: Verify the LRC register layout between init and HWChris Wilson1-41/+21
2019-09-10drm/i915/execlists: Clear STOP_RING bit on resetChris Wilson1-0/+2
2019-09-06drm/i915/tgl: Register state context definition for Gen12Michel Thierry1-1/+5
2019-08-20drm/i915/tgl: add Gen12 default indirect ctx offsetDaniele Ceraolo Spurio1-0/+1
2019-06-17drm/i915/gtt: Use a common type for page directoriesMika Kuoppala1-1/+1
2019-04-24drm/i915: Move GraphicsTechnology files under gt/Chris Wilson1-0/+68
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-18 00:54:21 +0300