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path: root/drivers/gpu/drm/i915/display/intel_dsb_regs.h
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2025-05-26drm/i915/dsb: Add support for GOSUB interruptChaitanya Kumar Borah1-0/+2
DSB raises an interrupt when there is a nested GOSUB command or illegal Head/Tail. Add support to log such errors in the DSB interrupt handler. v2: Enable support only in platforms that support this (Ville) Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://lore.kernel.org/r/20250523062041.166468-7-chaitanya.kumar.borah@intel.com
2024-06-27drm/i915/dsb: Try to document that DSB_STATUS bit 16 is level triggeredVille Syrjälä1-1/+1
DSB_STATUS bit 16 is supposed to be a sticky bit informing us whether the DSB was idle or not when the pipe's delayed vblank (when double buffered registers latch) occurred. Unfortunately it turns out this is a level triggred signal, ie. the bit will be set whenever the DSB is busy during the scanline window between start of delayed vblank and vtotal. Try to document that fact by renaming the bit. Sadly this also thwarts my plan to use this bit to sanity check that the (to be introduced) DSB based vblank evasion did its job correctly. That would require an edge triggered signal instead. So looks like we'll have to rely mostly on luck instead :( Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-12-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2024-06-20drm/i915/dsb: Document that the ATS fault bits are for mtl+Ville Syrjälä1-2/+2
The ATS faults have something to do with some new iommu stuff on mtl+. Document that the relevant DSB interrupt bits aren't valid for earlier platforms. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-11-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2023-09-27drm/i915/dsb: Define more DSB bitsVille Syrjälä1-0/+31
Define all the DSB register bits so I don't have to look through bspec to find them. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230606191504.18099-5-ville.syrjala@linux.intel.com Reviewed-by: Uma Shankar <uma.shankar@intel.com>
2023-03-30drm/i915/dsb: split out DSB regs to a separate fileJani Nikula1-0/+67
Clean up i915_reg.h by splitting out DSB regs to display/intel_dsb_regs.h. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/d74b3c564b2d080bf689b3360f1a5e62e47f2e7c.1678973283.git.jani.nikula@intel.com