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path: root/drivers/gpu/drm/i915/display/intel_ddi.h
AgeCommit message (Expand)AuthorFilesLines
2023-07-06drm/i915: Try to initialize DDI/ICL+ DSI ports for every VBT child deviceVille Syrjälä1-1/+3
2023-04-19drm/i915/dp_mst: Fix active port PLL selection for secondary MST streamsImre Deak1-0/+3
2023-03-22drm/i915: Add encoder hook to get the PLL type used by TC portsImre Deak1-0/+3
2023-02-18drm/i915: Rename intel_ddi_{enable,disable}_pipe_clock()Ville Syrjälä1-3/+3
2022-02-02drm/i915: Only include i915_reg.h from .c filesMatt Roper1-1/+1
2021-11-19drm/i915: drop intel_display.h include from intel_ddi.hJani Nikula1-1/+3
2021-10-19drm/i915: Move intel_ddi_fdi_post_disable() to fdi codeVille Syrjälä1-0/+1
2021-10-04drm/i915: Pass the lane to intel_ddi_level()Ville Syrjälä1-1/+2
2021-10-04drm/i915: Nuke useless .set_signal_levels() wrappersVille Syrjälä1-4/+2
2021-06-23drm/i915: s/intel/hsw/ for hsw/bdw/skl buf transVille Syrjälä1-2/+2
2021-03-08drm/i915: Extend icl_sanitize_encoder_pll_mapping() to all DDI platformsVille Syrjälä1-1/+1
2021-03-08drm/i915: Add encoder->is_clock_enabled()Ville Syrjälä1-0/+1
2021-03-08drm/i915: Move DDI clock readout to encoder->get_config()Ville Syrjälä1-2/+6
2021-02-16drm/i915: Extract hsw_ddi_{enable,disable}_clock()Ville Syrjälä1-0/+3
2021-02-16drm/i915: Introduce .{enable,disable}_clock() encoder vfuncsVille Syrjälä1-2/+2
2021-02-16drm/i915: Use intel_ddi_clk_select() for FDIVille Syrjälä1-1/+2
2021-02-05drm/i915: migrate hsw fdi code to new file.Dave Airlie1-2/+6
2021-01-13drm/i915/hdcp: HDCP stream encryption supportAnshuman Gupta1-3/+3
2020-10-01drm/i915: Eliminate intel_dp.regs.dp_tp_{ctl,status}Ville Syrjälä1-0/+5
2020-10-01drm/i915: Plumb crtc_state to link trainingVille Syrjälä1-2/+4
2020-09-01drm/i915: Use the cpu_transcoder in intel_hdcp to toggle HDCP signallingSean Paul1-0/+2
2020-06-03drm/i915: Add {preemph,voltage}_max() vfuncsVille Syrjälä1-3/+0
2020-04-20drm/i915: Pass encoder all the way to intel_ddi_transcoder_func_reg_val_get()Ville Syrjälä1-1/+2
2020-04-20drm/i915: Pass encoder to intel_ddi_enable_pipe_clock()Ville Syrjälä1-1/+2
2020-04-03drm/i915: Pass atomic state to encoder hooksVille Syrjälä1-1/+2
2020-03-02drm/i915: Move DPLL frequency calculation to intel_dpll_mgr.cImre Deak1-2/+0
2020-02-27drm/i915: significantly reduce the use of <drm/i915_drm.h>Jani Nikula1-2/+0
2019-12-18drm/i915: Call hsw_fdi_link_train() directly()Ville Syrjälä1-1/+1
2019-10-15drm/i915/dp: Add support of BT.2020 Colorimetry to DP MSAGwan-gyeong Mun1-1/+2
2019-06-17drm/i915: move modesetting output/encoder code under display/Jani Nikula1-0/+52
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