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path: root/drivers/gpu/drm/amd/include/asic_reg
AgeCommit message (Expand)AuthorFilesLines
2022-05-26drm/amd/display: Add HDMI_ACP_SEND registerAlan Liu9-2/+18
2022-05-11drm/amdgpu: add lsdma v6_0_0 ip headersHawking Zhang2-0/+1830
2022-05-06drm/amd/psp: Add C2P registers to mp_13_0_2 headerAndrey Grodzovsky2-0/+120
2022-05-06drm/amdgpu: add hdp v5_2_1 ip headersHuang Rui2-0/+901
2022-05-06drm/amdgpu: add nbio v7_7_0 ip headersHuang Rui2-0/+184057
2022-05-05drm/amdgpu: add mmhub v3_0_2 ip headersHawking Zhang2-0/+8653
2022-05-04drm/amdgpu: add vcn 4_0_0 header files v7Leo Liu2-0/+9665
2022-05-04drm/amdgpu: add mmhub v3_0_0 ip headers v6Hawking Zhang2-0/+9007
2022-05-04drm/amdgpu: add athub v3_0_0 ip headers v6Hawking Zhang2-0/+1505
2022-05-04drm/amdgpu: add smuio v13_0_6 ip headers v4Hawking Zhang2-0/+1695
2022-05-04drm/amdgpu: add hdp v6_0_0 ip headers v4Hawking Zhang2-0/+855
2022-05-04drm/amdgpu: add osssys v6_0_0 ip headers v4Hawking Zhang2-0/+1232
2022-05-04drm/amdgpu: add nbio v4_3_0 ip headers v6Hawking Zhang2-0/+99428
2022-04-29drm/amdgpu: add gc v11_0_0 ip headers v11Hawking Zhang3-0/+59419
2022-04-29drm/amdgpu: add mp v13_0_0 ip headers v7Hawking Zhang2-0/+1143
2022-03-28drm/amdgpu/vcn: Add vcn and jpeg ver 2.6 ras register definitionMohammad Zafar Ziya2-0/+37
2022-02-25drm/amdgpu: config HDP_MISC_CNTL.READ_BUFFER_WATERMARKXiaogang Chen1-0/+2
2022-02-18drm/amd/include: add DCN 3.1.5 registersQingqing Zhuo4-0/+192842
2022-02-18drm/amdgpu: add mp 13.0.5 header filesYifan Zhang2-0/+1127
2022-02-17drm/amd/include: Add MP 13.0.8 register headersLeo Li2-0/+1013
2022-02-17drm/amd/include: Add register headers for DCN 3.1.6Leo Li4-0/+226509
2022-02-14drm/amdgpu: print more error infoStanley.Yang1-0/+6
2022-02-08drm/amdgpu: move dpcs_3_0_3 headers from dcn to dpcsAlex Deucher2-0/+0
2022-02-08drm/amdgpu: move dpcs_3_0_0 headers from dcn to dpcsAlex Deucher2-0/+0
2022-02-08drm/amdgpu: add missing license to dpcs_3_0_0 headersAlex Deucher2-0/+14
2021-12-16drm/amdgpu: clean up some leftovers from bring upAlex Deucher2-14/+0
2021-11-22drm/amd/pm: Add STB support in sienna_cichlidAndrey Grodzovsky2-0/+19
2021-10-20drm/amd/display: Disable hdmistream and hdmichar clocksJake Wang2-0/+10
2021-09-30drm/amdgpu: add cyan_skillfish asic header filesZhan Liu6-0/+29456
2021-09-30drm/amd/amdgpu: Add missing mp_11_0_8_sh_mask.h headerTom St Denis1-0/+355
2021-09-28drm/amdgpu: add poison mode query for DF (v2)Tao Zhou2-0/+137
2021-09-23drm/amd/display: Fix B0 USB-C DP Alt modeLiu, Zhan1-0/+27
2021-08-16drm/amd/pm: correct the fan speed RPM retrievingEvan Quan1-0/+3
2021-08-16drm/amd/pm: correct the fan speed PWM retrievingEvan Quan2-0/+6
2021-08-06drm/amd/amdgpu: add regCP_MEx_INT_STAT_DEBUG for Aldebaran debuggingTom St Denis2-0/+58
2021-07-23drm/amdgpu: add mp 11.0.8 header for cyan_skillfishLang Yu1-0/+352
2021-07-09drm/amd/pm: drop smu_v13_0_1.c|h files for yellow carpXiaomeng Hou2-886/+0
2021-07-08drm/amd/display: DMUB Outbound Interrupt Process-X86Chun-Liang Chang1-0/+4
2021-07-01drm/amdgpu: add license to umc_8_7_0_sh_mask.hAlex Deucher1-0/+21
2021-07-01drm/amdgpu: rectify line endings in umc v8_7_0 IP headersLukas Bulwahn1-79/+79
2021-06-16drm/amd/display: Add interface to get Calibrated Avg Level from FIFOWesley Chalmers2-0/+4
2021-06-04drm/amdgpu: add yellow carp asic header files (v3)Aaron Liu6-0/+192037
2021-05-20drm/amdgpu: Query correct register for DF hashing on AldebaranMukul Joshi1-0/+3
2021-05-20drm/amd/display: Edit license info for beige goby DC filesAurabindo Pillai4-37/+18
2021-05-20drm/amd/display: Add register definitions for Beige GobyAurabindo Pillai4-0/+45172
2021-05-11drm/amdgpu: Enable TCP channel hashing for AldebaranMukul Joshi1-0/+1
2021-04-21drm/amdgpu: only harvest gcea/mmea error status in arcturusHawking Zhang1-0/+16
2021-04-09drm/amd/amdgpu: Add CP_IB1_BASE_* to gc_10_3_0 headersTom St Denis2-0/+15
2021-03-10drm/amdgpu: add vcn v2_6_0 ip headers (v3)Hawking Zhang2-0/+5997
2021-03-10drm/amdgpu: add umc v6_7_0 ip headers (v3)Hawking Zhang2-0/+13416
generated by cgit v1.2.3 (git 2.39.0) at 2026-05-09 21:26:30 +0300