summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/display/dc/dccg/dcn401
AgeCommit message (Expand)AuthorFilesLines
2025-06-24drm/amd/display: Add num_slices_h to set_dto_dscclk signatureIlya Bakoulin2-3/+2
2025-02-25drm/amd/display: Refactor DCN4x and related codePatel, Swapnil2-4/+3
2025-02-13drm/amd/display: Allow reuse of of DCN4x codeDmytro2-13/+51
2024-10-02drm/amd/display: Configure DTBCLK_P with OPTC only for dcn401Dillon Varone1-3/+0
2024-10-02drm/amd/display: Adjust PHY FSM transition to TX_EN-to-PLL_ON for TMDSRyan Seto1-81/+0
2024-07-24drm/amd/display: fix dscclk programming sequence on DCN401Wenjing Liu2-14/+22
2024-06-28drm/amd/display: Refactor dccg401_get_other_enable_symclk_feRelja Vojvodic1-35/+22
2024-06-14drm/amd/display: Fix incorrect size calculation for loop in dcn401Alex Hung1-1/+1
2024-06-14drm/amd/display: Avoid programming DTO if Refclk is 0Chris Park1-0/+4
2024-06-05drm/amd/display: Keep VBios pixel rate div setting until next mode setyi-lchen1-2/+3
2024-05-20drm/amd/display: Add missing enable and disable symclk_se functions for dcn401Wenjing Liu2-0/+171
2024-05-13drm/amd/display: Refactor DCN401 DCCG into component directoryRevalla Hari Krishna2-0/+1040