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path: root/drivers/gpu/drm/amd/display/dc/clk_mgr
AgeCommit message (Expand)AuthorFilesLines
2026-03-25drm/amd: fix dcn 2.01 checkAndy Nguyen1-4/+4
2026-03-04drm/amd/display: Increase DCN35 SR enter/exit latencyLeo Li1-8/+8
2026-03-04drm/amd/display: Revert "init dispclk from bootup clock for DCN315"Wang, Sung-huai1-2/+1
2025-11-18drm/amd/display: Prevent Gating DTBCLK before It Is Properly LatchedFangzhi Zuo1-1/+3
2025-09-25drm/amd/display: Reject modes with too high pixel clock on DCE6-10Timur Kristóf2-0/+8
2025-09-23drm/amd/display: Init DCN35 clocks from pre-os HW valuesLeo Li1-2/+119
2025-09-23drm/amd/display: Revert "correct sw cache timing to ensure dispclk ramping"Charlene Liu1-21/+9
2025-09-23drm/amd/display: Correct sw cache timing to ensure dispclk rampingCharlene Liu1-9/+21
2025-09-23drm/amd/display: Refactor SMU tracingDillon Varone3-7/+12
2025-09-23drm/amd/display: Isolate dcn401 SMU functionsDillon Varone3-14/+140
2025-09-23drm/amd/display: Init dispclk from bootup clock for DCN314Lo-an Chen2-5/+142
2025-09-15drm/amd/display: Rename header file link.h to link_service.hWesley Chalmers8-8/+8
2025-09-15drm/amd/display: Add pixel_clock to amd_pp_display_configurationTimur Kristóf1-1/+1
2025-08-29drm/amd/display: use max() to improve codeQianfeng Rong2-10/+3
2025-08-19drm/amd/display: Fix DP audio DTO1 clock source on DCE 6.Timur Kristóf1-15/+6
2025-08-19drm/amd/display: Fill display clock and vblank time in dce110_fill_display_co...Timur Kristóf3-11/+3
2025-08-19drm/amd/display: Find first CRTC and its line time in dce110_fill_display_con...Timur Kristóf1-10/+20
2025-08-19drm/amd/display: Adjust DCE 8-10 clock, don't overclock by 15%Timur Kristóf1-7/+5
2025-08-19drm/amd/display: Don't overclock DCE 6 by 15%Timur Kristóf1-5/+3
2025-08-04drm/amd/display: update dpp/disp clock from smu clock tablePaul Hsieh1-0/+16
2025-08-04drm/amd/display: Fix DCE 6.0 and 6.4 PLL programming.Timur Kristóf1-0/+5
2025-08-04drm/amd/display: Don't overwrite dce60_clk_mgrTimur Kristóf1-1/+0
2025-07-15drm/amd/display: Initial support for SmartMuxAurabindo Pillai8-4/+226
2025-07-15drm/amd/display: Free memory allocationClayton King1-1/+2
2025-07-15drm/amd/display: Refactor DSC cap calculationsDillon Varone2-0/+32
2025-06-18drm/amd/display: Refactor DML2 DC power instanceDillon Varone2-0/+21
2025-06-18drm/amd/display: Remove dml/dcn401 files and referencesDillon Varone1-38/+29
2025-04-22drm/amd/display: Remove unused *vbios_smu_set_dprefclkDr. David Alan Gilbert4-30/+0
2025-04-08drm/amd/display: rename IPS2 entry/exit messageSherry Wang1-3/+3
2025-04-08drm/amd/display: Correct SSC enable detection for DCN351Kevin Gao2-1/+8
2025-04-07drm/amd/display: Use sync version of indirect register access.JinZe.Xu1-15/+14
2025-03-18drm/amd/display: Guard against setting dispclk low for dcn31xJing Zhou2-11/+22
2025-03-18drm/amd/display: Check pipe->stream before passing it to a functionAlex Hung1-9/+6
2025-03-10drm/amd/display: remove minimum Dispclk and apply oem panel timing.Charlene Liu2-4/+0
2025-03-05drm/amd/display: misc for dio encoder refactorPeichen Huang1-5/+15
2025-02-19drm/amd/display: Guard against setting dispclk low when activeNicholas Kazlauskas1-4/+9
2025-02-13drm/amd/display: Exclude clkoffset and ips setting for dcn351 specificCharlene Liu1-2/+2
2025-02-13drm/amd/display: Populate register address for dentist for dcn401Dillon Varone1-0/+2
2025-01-29drm/amd/display: Correct register address in dcn35loanchen1-1/+1
2025-01-10drm/amd/display: avoid reset DTBCLK at clock initCharlene Liu1-6/+12
2025-01-10drm/amd/display: Add SMU interface to get UMC count for dcn401Dillon Varone4-1/+27
2025-01-10drm/amd/display: Log Hard Min Clocks and Phantom Pipe StatusSung Lee1-0/+16
2025-01-06drm/amd/display: Cleanup outdated interfaces in dcn401_clk_mgrDillon Varone1-223/+17
2024-12-18drm/amd/display: Add new message for DF throttling optimization on dcn401Dillon Varone4-0/+73
2024-12-10drm/amdgpu: rename register headers to dcn_2_0_1Leo Li1-2/+2
2024-12-10drm/amd/display: update dcn351 used clock offsetCharlene Liu5-34/+249
2024-12-10drm/amd/display: correct dcn351 dpm clk table based on pmfw_drv_ifCharlene Liu2-15/+119
2024-11-04drm/amd/display: Remove otg w/a toggling on HPO interfacesAusef Yousof1-1/+9
2024-11-04drm/amd/display: Remove hw w/a toggle if on DP2/HPOAusef Yousof1-2/+9
2024-10-28drm/amd/display: Simplify dcn35_is_ips_supported()Alex Hung1-4/+1
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