summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
AgeCommit message (Expand)AuthorFilesLines
2018-02-19drm/amdgpu: remove now superflous *_hdp operationChristian König1-35/+2
2018-02-19drm/amdgpu: implement gmc_v9_0_emit_flush_gpu_tlbChristian König1-36/+7
2018-02-19drm/amdgpu: wire up emit_wreg for UVD v7Christian König1-7/+17
2018-02-19drm/amdgpu: forward pasid to backend flush implementationsChristian König1-2/+4
2018-02-19drm/amdgpu: move struct gart_funcs into amdgpu_gmc.hChristian König1-4/+4
2017-12-27drm/amdgpu: rename vm_id to vmidChristian König1-18/+18
2017-12-12drm/amdgpu: allow get_vm_pde to change flags as wellChristian König1-5/+7
2017-12-08drm/admgpu: Reduce the usage of soc15ip.hShaoyun Liu1-1/+0
2017-12-08drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offsetShaoyun Liu1-0/+13
2017-12-08drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const arrayShaoyun Liu1-2/+12
2017-12-07drm: move amd_gpu_scheduler into common locationLucas Stach1-4/+4
2017-12-06drm/amd/include:cleanup vega10 header files.Feifei Xu1-1/+1
2017-12-06drm/amd/include:cleanup vega10 nbif header files.Feifei Xu1-1/+1
2017-12-06drm/amd/include:cleanup vega10 mmhub header files.Feifei Xu1-2/+2
2017-12-06drm/amd/include:cleanup vega10 vce header files.Feifei Xu1-3/+3
2017-12-06drm/amd/include:cleanup vega10 uvd header files.Feifei Xu1-2/+2
2017-12-06drm/amd/include:cleanup vega10 hdp header files.Feifei Xu1-1/+1
2017-12-06drm/amd/amdgpu: fix UVD mc offsetsPiotr Redlewski1-1/+1
2017-12-05drm/amdgpu: change redundant init logs to debug levelpding1-3/+3
2017-12-05drm/amd/scheduler:introduce guilty pointer memberMonk Liu1-1/+1
2017-10-26drm/amd/amdgpu: Remove workaround for suspend/resume in uvd7Tom St Denis1-11/+5
2017-09-26drm/amdgpu:use formal register to trigger hdp invalidateMonk Liu1-1/+1
2017-08-15drm/amdgpu/uvd7: optimize uvd initialization sequence for SRIOVFrank Min1-47/+11
2017-08-15drm/amdgpu: According hardware design revert vce and uvd doorbell assignmentFrank Min1-2/+8
2017-08-15drm/amdgpu: Skip uvd and vce ring test for SRIOVFrank Min1-0/+3
2017-08-15drm/amdgpu: Enable uvd and vce gpu re-init for SRIOV gpu resetFrank Min1-2/+1
2017-08-15drm/amdgpu: Clear vce&uvd ring wptr for SRIOVFrank Min1-1/+5
2017-06-15drm/amd/amdgpu: Port UVD 7.0 over to new SOC15 macrosTom St Denis1-87/+87
2017-05-31drm/amdgpu: cleanup adjust_mc_addr handling v4Christian König1-8/+4
2017-05-25drm/amdgpu: move adjust adjust_mc_addr into the GFX9 vm_flush functionsChristian König1-0/+2
2017-05-25drm/amdgpu: clean doorbell after sending init table to mmschFrank Min1-0/+1
2017-05-25drm/amdgpu: Bypass GMC/UVD/VCE hw_fini in SR-IOVTrigger Huang1-1/+7
2017-04-29drm/amdgpu/uvd7: add UVD hw init sequences for sriovFrank Min1-45/+56
2017-04-29drm/amdgpu/uvd7: add uvd doorbell initialization for sriovFrank Min1-0/+14
2017-04-29drm/amdgpu/uvd7: add sriov uvd initialization sequencesFrank Min1-0/+246
2017-04-29drm/amdgpu: assign VM invalidation engine manually v2Christian König1-2/+2
2017-04-29drm/amdgpu: invalidate only the currently needed VMHUB v2Christian König1-61/+50
2017-04-29drm/amdgpu: add VMHUB to ring associationChristian König1-0/+2
2017-04-06drm/amdgpu: cleanup get_invalidate_req v2Christian König1-2/+2
2017-04-04drm/amdgpu: various cleanups for uvd/vce.Rex Zhu1-14/+3
2017-03-30drm/amdgpu: add initial uvd 7.0 support for vega10Leo Liu1-0/+1543
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-25 23:35:43 +0300