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path: root/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
AgeCommit message (Expand)AuthorFilesLines
2020-05-18drm/amdgpu: apply AMDGPU_IB_FLAG_EMIT_MEM_SYNC to compute IBs too (v3)Marek Olšák1-1/+3
2020-05-18drm/amdgpu: Add mem_sync implementation for all the ASICs.Andrey Grodzovsky1-1/+26
2020-05-14drm/amdgpu: turn back rlcg write for gfx_v10Yintian Tao1-8/+6
2020-05-08drm/amdgpu: implement soft_recovery for gfx10Alex Deucher1-0/+14
2020-05-06drm/amdgpu: drop unnecessary cancel_delayed_work_sync on PG ungateEvan Quan1-5/+1
2020-05-06drm/amdgpu: disable MGCG/MGLS also on gfx CG ungateEvan Quan1-1/+1
2020-05-01amd/amdgpu: Limit rlcg write registers only for nv12shaoyunl1-7/+25
2020-05-01drm/amdgpu: check SMU NULL ptr on gfx hw initLikun Gao1-7/+9
2020-04-28drm/amdgpu: Fix per-IB secure flag GFX hangHuang Rui1-7/+8
2020-04-28drm/amdgpu: Move to a per-IB secure flag (TMZ)Luben Tuikov1-16/+7
2020-04-28drm/amdgpu: implement TMZ accessor (v3)Luben Tuikov1-1/+1
2020-04-28drm/amdgpu: enable TMZ bit in FRAME_CONTROL for gfx10Aaron Liu1-1/+1
2020-04-28drm/amdgpu: expand the context control interface with trust flagHuang Rui1-1/+3
2020-04-28drm/amdgpu: expand the emit tmz interface with trusted flagHuang Rui1-4/+12
2020-04-24drm/amdgpu: skip cg/pg set for SRIOVMonk Liu1-0/+7
2020-04-23drm/amdgpu: request reg_val_offs each kiq read regYintian Tao1-4/+4
2020-04-23drm/amdgpu: change how we update mmRLC_SPM_MC_CNTLChristian König1-3/+10
2020-04-09drm/amd/amdgpu: Correct gfx10's CG sequenceChengming Gui1-8/+15
2020-04-09drm/amdgpu: add SPM golden settings for Navi12Tianci.Yin1-0/+1059
2020-04-09drm/amdgpu: add SPM golden settings for Navi14Tianci.Yin1-0/+627
2020-04-09drm/amdgpu: add SPM golden settings for Navi10(v2)Tianci.Yin1-0/+1059
2020-04-09drm/amdgpu: rework sched_list generationNirmoy Das1-7/+7
2020-04-01drm/amdgpu: stop disable the scheduler during HW finiChristian König1-8/+0
2020-04-01drm/amdgpu: implement more ib pools (v2)xinhui pan1-1/+2
2020-03-31drm/amdgpu: fix hpd bo size calculation errorKevin Wang1-1/+1
2020-03-20drm/amdgpu/sriov : Don't resume RLCG for SRIOV guestshaoyunl1-0/+5
2020-03-19drm: amd: fix spelling mistake "shoudn't" -> "shouldn't"Colin Ian King1-1/+1
2020-03-16drm/amdgpu: revise RLCG access pathMonk Liu1-1/+73
2020-03-09drm/amdgpu: set compute queue priority at mqd_initNirmoy Das1-0/+19
2020-03-05drm/amdgpu/sriov: Use VF-accessible register for gpu_clock_countjianzh1-3/+4
2020-03-05drm/amdgpu: stop using sratch_reg in IB testMonk Liu1-21/+17
2020-03-05drm/amdgpu: fix IB test MCBP bugMonk Liu1-1/+1
2020-03-05drm/amdgpu: disable 3D pipe 1 on Navi1xTianci.Yin1-46/+51
2020-03-05drm/amdgpu: Write blocked CP registers using RLC on VFRohit Khaire1-4/+4
2020-03-05drm/amdgpu: clean wptr on wb when gpu recoveryYintian Tao1-0/+1
2020-02-29drm/amdgpu: Initialize SPM_VMID with 0xf (v2)Jacob He1-1/+18
2020-02-26drm/amdgpu: use amdgpu_ring_test_helper when possibleNirmoy Das1-7/+2
2020-02-25drm/amdgpu: fix colliding of preemptionMonk Liu1-4/+4
2020-02-13drm/amdgpu/gfx10: disable gfxoff when reading rlc clockAlex Deucher1-0/+2
2020-01-23drm/amdgpu: remove unnecessary conversion to boolNirmoy Das1-2/+2
2020-01-23drm/amdgpu: provide a generic function interface for reading/writing register...chen gong1-2/+3
2020-01-23drm/amdgpu: modify packet size for pm4 flush tlbsAlex Sierra1-1/+1
2020-01-16drm/amdgpu: only set cp active field for kiq queueHuang Rui1-2/+5
2020-01-16drm/amdgpu/gfx10: update gfx golden settings for navi14Tianci.Yin1-1/+1
2020-01-16drm/amdgpu/gfx10: update gfx golden settingsTianci.Yin1-1/+1
2020-01-16drm/amdgpu: check rlc_g firmware pointer is valid before using itshaoyunl1-4/+5
2020-01-16drm/amdgpu: implement tlbs invalidate on gfx9 gfx10Alex Sierra1-0/+15
2020-01-07drm/amdgpu/gfx: simplify old firmware warningAlex Deucher1-2/+1
2019-12-19drm/amdgpu: Remove unneeded semicolon in gfx_v10_0.czhengbin1-1/+1
2019-12-19drm/amdgpu/gfx10: make ring tests less chattyAlex Deucher1-29/+10
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