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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu.h
AgeCommit message (Expand)AuthorFilesLines
2016-07-07drm/amdgpu: remove now unnecessary checksChristian König1-1/+0
2016-07-07drm/amdgpu: use a fence array for VMID managementChristian König1-4/+6
2016-07-07drm/amdgpu: add optional ring to amdgpu_sync_is_idleChristian König1-1/+2
2016-07-07drm/amdgpu: remove amdgpu_sync_waitChristian König1-1/+0
2016-07-07drm/amdgpu: add amdgpu.cg_mask and amdgpu.pg_mask parametersNicolai Hähnle1-0/+2
2016-07-07drm/amdgpu: fix ring debugfs bugMonk Liu1-0/+3
2016-07-07drm/amdgpu/atpx: track whether if this is a hybrid graphics platformAlex Deucher1-0/+2
2016-07-07drm/amdgpu/atpx: add a query for ATPX dGPU power controlAlex Deucher1-0/+2
2016-07-07drm/amdgpu: add the common code to support mclk ODEric Huang1-0/+8
2016-07-07drm/amdgpu: add powercontainment module parameterHuang Rui1-0/+1
2016-07-07drm/amdgpu: fix and cleanup job destructionChristian König1-1/+0
2016-07-07drm/amdgpu: properly abstract scheduler timeout handlingChristian König1-1/+0
2016-07-07drm/amdgpu: add the new common pm code to support sclk ODEric Huang1-0/+2
2016-07-07drm/amdgpu: add the new common pm code to select the clock levelsEric Huang1-0/+2
2016-07-07drm/amdgpu: add powerplay sclk OD support through sysfs (v2)Eric Huang1-0/+6
2016-07-02Back-merge tag 'v4.7-rc5' into drm-nextDave Airlie1-0/+7
2016-06-14Revert "drm/amdgpu: add pipeline sync while vmid switch in same ctx"Alex Deucher1-3/+1
2016-06-13amdgpu: fix asic initialization for virtualized environments (v2)Andres Rodriguez1-0/+7
2016-06-09drm/amdgpu: add pipeline sync while vmid switch in same ctxChunming Zhou1-1/+3
2016-06-02dma-buf/fence: make fence context 64 bit v2Christian König1-1/+1
2016-05-13drm/amdgpu: create fence slab once when amdgpu module init.Rex Zhu1-0/+2
2016-05-11drm/amdgpu: fix and cleanup user fence handling v2Christian König1-12/+7
2016-05-11drm/amdgpu: move VM fields into jobChristian König1-7/+8
2016-05-11drm/amdgpu: move the context from the IBs into the jobChristian König1-1/+1
2016-05-11drm/amdgpu: move context switch handling into common code v2Christian König1-2/+2
2016-05-11drm/amdgpu: use fence_context to judge ctx switch v2Christian König1-2/+2
2016-05-11drm/amdgpu: Support DRM_MODE_PAGE_FLIP_ASYNC (v2)Alex Deucher1-1/+2
2016-05-11drm/amdgpu: fetch cu_info once at initAlex Deucher1-11/+9
2016-05-11drm/amd: cleanup remaining spaces and tabs v2Christian König1-6/+6
2016-05-11drm/amdgpu: remove define for reserved client IDChristian König1-1/+0
2016-05-11drm/amdgpu: make the VMID owner always 64bitChristian König1-1/+1
2016-05-11drm/amdgpu: two minor 80 char fixesChristian König1-4/+6
2016-05-11drm/amdgpu: keep vm in job instead of ib (v2)Monk Liu1-3/+3
2016-05-11drm/amdgpu: add client id for every vmChunming Zhou1-0/+6
2016-05-09Merge tag 'v4.6-rc7' into drm-nextDave Airlie1-0/+2
2016-05-05drm/amd/amdgpu: Add debugfs entries for smc/didt/pcieTom St Denis1-1/+1
2016-05-05drm/amd/amdgpu: add power gating initialization support for GFX8.0Eric Huang1-0/+14
2016-05-05drm/amdgpu: group BOs by log2 of the size on the LRU v2Christian König1-0/+11
2016-05-05drm/amdgpu: only update last_flush when vmid doesn't have other new ownerChunming Zhou1-0/+1
2016-05-05drm/amdgpu: add a new set of rlc function pointersAlex Deucher1-0/+9
2016-05-05drm/amd: make a type-safe cgs_device struct. (v2)Dave Airlie1-9/+2
2016-05-05drm/amdgpu: handle more than 10 UVD sessions (v2)Arindam Nath1-4/+7
2016-05-05drm/amdgpu: Mark all instances of struct drm_info_list as constNils Wallménius1-2/+2
2016-05-05drm/amd/scheduler: Mark amdgpu_sched_ops constNils Wallménius1-1/+1
2016-05-05drm/amd: Mark some tables as constNils Wallménius1-1/+1
2016-05-05drm/amdgpu: add a fence after the VM flushChristian König1-5/+6
2016-05-05drm/amdgpu: use a sync object for VMID fences v2Christian König1-1/+5
2016-05-05drm/amdgpu: merge VM manager and VM context ID structureChristian König1-10/+7
2016-05-02drm/amdgpu: optionally enable GART debugfs fileChristian König1-0/+2
2016-05-02drm/amdgpu: remove GART page addr arrayChristian König1-1/+0
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