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2025-10-13EDAC/versalnet: Fix off by one in handle_error()Dan Carpenter1-1/+1
2025-09-30Merge tag 'edac_updates_for_v6.18' of git://git.kernel.org/pub/scm/linux/kern...Linus Torvalds16-57/+1342
2025-09-26Merge branches 'edac-drivers' and 'edac-misc' into edac-updatesBorislav Petkov (AMD)3-0/+0
2025-09-18EDAC/versalnet: Return the correct error in mc_probe()Dan Carpenter1-1/+3
2025-09-17EDAC/mc_sysfs: Increase legacy channel support to 16Avadhut Naik1-0/+24
2025-09-17EDAC/amd64: Add support for AMD family 1Ah-based newer modelsAvadhut Naik2-1/+21
2025-09-15EDAC: Add a driver for the AMD Versal NET DDR controllerShubhrajyoti Datta3-0/+967
2025-09-03EDAC/skx_common: Use topology_physical_package_id() instead of open codingQiuxu Zhuo1-1/+2
2025-08-30EDAC: Fix wrong executable file modes for C source filesKuan-Wei Chiu3-0/+0
2025-08-25EDAC/altera: Delete an inappropriate dma_free_coherent() callSalah Triki1-1/+0
2025-08-20EDAC/altera: Use dev_fwnode()Jiri Slaby (SUSE)1-2/+2
2025-08-20EDAC/skx_common: Remove unused *NUM*_IMC macrosQiuxu Zhuo1-5/+0
2025-08-20EDAC/i10nm: Reallocate skx_dev list if preconfigured cnt != runtime cntQiuxu Zhuo1-6/+7
2025-08-20EDAC/skx_common: Remove redundant upper bound check for res->imcQiuxu Zhuo1-1/+1
2025-08-20EDAC/skx_common: Make skx_dev->imc[] a flexible arrayQiuxu Zhuo2-2/+3
2025-08-20EDAC/skx_common: Swap memory controller index mappingQiuxu Zhuo1-8/+20
2025-08-20EDAC/skx_common: Move mc_mapping to be a field inside struct skx_imcQiuxu Zhuo2-14/+14
2025-08-20EDAC/{skx_common,skx}: Use configuration data, not global macrosQiuxu Zhuo3-20/+30
2025-08-20EDAC/i10nm: Skip DIMM enumeration on a disabled memory controllerQiuxu Zhuo1-0/+14
2025-08-20EDAC/ie31200: Add two more Intel Alder Lake-S SoCs for EDAC supportKyle Manna1-0/+4
2025-08-16EDAC: Add EDAC driver for ARM Cortex A72 coresSascha Hauer3-0/+234
2025-07-30Merge tag 'edac_updates_for_v6.17_rc1' of git://git.kernel.org/pub/scm/linux/...Linus Torvalds6-102/+140
2025-07-15EDAC/{skx_common,i10nm}: Use scnprintf() for safer buffer handlingWang Haoran2-11/+11
2025-07-14EDAC/synopsys: Clear the ECC counters on initShubhrajyoti Datta1-51/+46
2025-07-07EDAC/ie31200: Add Intel Raptor Lake-HX SoCs supportQiuxu Zhuo1-0/+4
2025-07-07EDAC/igen6: Add Intel Wildcat Lake SoCs supportLili Li1-0/+15
2025-07-07EDAC/i10nm: Add Intel Granite Rapids-D supportQiuxu Zhuo1-1/+11
2025-06-30EDAC: Initialize EDAC features sysfs attributesShiju Jose3-1/+5
2025-06-26EDAC/mem_repair: Reduce stack usage in edac_mem_repair_get_desc()Arnd Bergmann1-34/+22
2025-06-25EDAC/amd64: Fix size calculation for Non-Power-of-Two DIMMsAvadhut Naik1-21/+36
2025-06-23EDAC/igen6: Reduce log level to debug for absent memory controllersQiuxu Zhuo1-1/+1
2025-06-23EDAC/ie31200: Document which CPUs correspond to each Raptor Lake-S device IDGeorge Gaidarov1-6/+6
2025-06-23EDAC/ie31200: Enable support for Core i5-14600 and i7-14700George Gaidarov1-0/+4
2025-06-23ie31200/EDAC: Add Intel Bartlett Lake-S SoCs supportQiuxu Zhuo1-0/+22
2025-06-18EDAC/igen6: Fix NULL pointer dereferenceQiuxu Zhuo1-11/+13
2025-06-17EDAC/amd64: Correct number of UMCs for family 19h models 70h-7fhAvadhut Naik1-0/+1
2025-06-03Merge tag 'cxl-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...Linus Torvalds1-0/+9
2025-05-29EDAC/altera: Use correct write width with the INTTEST registerNiravkumar L Rabara1-3/+3
2025-05-27Merge tag 'edac_updates_for_v6.16' of git://git.kernel.org/pub/scm/linux/kern...Linus Torvalds6-231/+422
2025-05-27Merge tag 'irq-cleanups-2025-05-25' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds1-2/+2
2025-05-23cxl/edac: Add CXL memory device memory sparing control featureShiju Jose1-0/+9
2025-05-22EDAC/bluefield: Don't use bluefield_edac_readl() result on errorDavid Thompson1-5/+15
2025-05-16EDAC/altera: Switch to irq_domain_create_linear()Jiri Slaby (SUSE)1-2/+2
2025-05-13Merge branch 'x86/msr' into x86/core, to resolve conflictsIngo Molnar3-3/+5
2025-05-06Merge tag 'v6.15-rc5' into x86/msr, to pick up fixes and to resolve conflictsIngo Molnar2-4/+7
2025-05-06Merge tag 'v6.15-rc5' into x86/cpu, to resolve conflictsIngo Molnar2-4/+7
2025-05-02x86/msr: Add explicit includes of <asm/msr.h>Xin Li (Intel)2-0/+2
2025-04-28EDAC/altera: Set DDR and SDMMC interrupt mask before registrationNiravkumar L Rabara2-3/+6
2025-04-28EDAC/altera: Test the correct error reg offsetNiravkumar L Rabara1-1/+1
2025-04-24EDAC/i10nm: Fix the bitwise operation between variables of different sizesQiuxu Zhuo1-2/+2
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