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path: root/drivers/edac/i10nm_base.c
AgeCommit message (Expand)AuthorFilesLines
2024-05-29EDAC/i10nm: Switch to new Intel CPU model definesTony Luck1-10/+10
2024-02-01EDAC/i10nm: Add Intel Grand Ridge micro-server supportQiuxu Zhuo1-0/+1
2023-08-31Merge tag 'edac_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds1-5/+49
2023-08-09x86/cpu: Fix Crestmont uarchPeter Zijlstra1-1/+1
2023-07-24EDAC/i10nm: Skip the absent memory controllersQiuxu Zhuo1-5/+49
2023-04-10EDAC/i10nm: Add Intel Sierra Forest server supportQiuxu Zhuo1-0/+1
2023-02-08EDAC/i10nm: Add driver decoder for Sapphire Rapids serverYouquan Song1-33/+69
2023-01-25EDAC/i10nm: Add Intel Granite Rapids server supportQiuxu Zhuo1-23/+214
2023-01-25EDAC/i10nm: Make more configurations CPU model specificQiuxu Zhuo1-40/+91
2023-01-25EDAC/i10nm: Add Intel Emerald Rapids server supportQiuxu Zhuo1-0/+1
2022-12-12Merge branches 'edac-ghes' and 'edac-misc' into edac-updates-for-v6.2Borislav Petkov (AMD)1-2/+1
2022-11-28EDAC/i10nm: fix refcount leak in pci_get_dev_wrapper()Yang Yingliang1-2/+1
2022-10-21EDAC: Check for GHES preference in the chipset-specific EDAC driversJia He1-0/+3
2022-09-23EDAC/i10nm: Print an extra register set of retry_rd_err_logQiuxu Zhuo1-11/+70
2022-09-23EDAC/i10nm: Retrieve and print retry_rd_err_log registers for HBMQiuxu Zhuo1-17/+67
2022-09-08EDAC/i10nm: Add driver decoder for Ice Lake and Tremont CPUsYouquan Song1-2/+132
2022-01-04EDAC/i10nm: Release mdev/mbase when failing to detect HBMQiuxu Zhuo1-0/+9
2021-08-23EDAC/i10nm: Retrieve and print retry_rd_err_log registersYouquan Song1-0/+146
2021-08-23EDAC/i10nm: Fix NVDIMM detectionQiuxu Zhuo1-3/+3
2021-06-18EDAC/Intel: Do not load EDAC driver when running as a guestLuck, Tony1-0/+3
2021-06-18EDAC/i10nm: Add support for high bandwidth memoryQiuxu Zhuo1-12/+120
2021-06-18EDAC/i10nm: Add detection of memory levels for ICX/SPR serversQiuxu Zhuo1-0/+39
2020-11-19EDAC/i10nm: Add Intel Sapphire Rapids server supportQiuxu Zhuo1-9/+25
2020-11-19EDAC/i10nm: Use readl() to access MMIO registersQiuxu Zhuo1-4/+7
2020-06-16EDAC, {skx,i10nm}: Use CPU stepping macro to pass configurationsQiuxu Zhuo1-7/+5
2020-06-01Merge branches 'edac-i10nm' and 'edac-misc' into edac-updates-for-5.8Borislav Petkov1-5/+24
2020-05-20EDAC/skx: Use the mcmtr register to retrieve close_pg/bank_xor_enableQiuxu Zhuo1-1/+1
2020-04-27EDAC/i10nm: Update driver to support different bus number config register off...Qiuxu Zhuo1-4/+14
2020-04-27EDAC, {skx,i10nm}: Make some configurations CPU model specificQiuxu Zhuo1-4/+13
2020-03-24EDAC: Convert to new X86 CPU match macrosThomas Gleixner1-4/+4
2019-11-09EDAC: Replace EDAC_DIMM_PTR() macro with edac_get_dimm() functionRobert Richter1-2/+1
2019-08-28x86/intel: Aggregate microserver namingPeter Zijlstra1-2/+2
2019-06-26EDAC, skx, i10nm: Fix source ID register offsetQiuxu Zhuo1-1/+1
2019-06-26EDAC, i10nm: Check ECC enabling status per channelQiuxu Zhuo1-3/+3
2019-06-20EDAC, i10nm: Add Intel additional Ice-Lake supportQiuxu Zhuo1-0/+2
2019-03-23EDAC, skx, i10nm: Make skx_common.c a pure libraryQiuxu Zhuo1-2/+50
2019-02-02EDAC, i10nm: Add a driver for Intel 10nm server processorsQiuxu Zhuo1-0/+275