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path: root/drivers/edac/amd64_edac.h
AgeCommit message (Expand)AuthorFilesLines
2022-02-24EDAC/amd64: Add new register offset support and related changesYazen Ghannam1-0/+14
2022-02-23EDAC/amd64: Set memory type per DIMMYazen Ghannam1-1/+9
2021-12-24EDAC/amd64: Add support for family 19h, models 50h-5fhMarc Bevand1-0/+3
2021-12-10EDAC/amd64: Add support for AMD Family 19h Models 10h-1Fh and A0h-AFhYazen Ghannam1-1/+4
2020-12-28EDAC/amd64: Merge error injection sysfs facilitiesBorislav Petkov1-4/+0
2020-12-28EDAC/amd64: Merge sysfs debugging attributes setup codeBorislav Petkov1-7/+0
2020-05-22EDAC/amd64: Add AMD family 17h model 60h PCI IDsAlexander Monakov1-0/+3
2020-01-16EDAC/amd64: Add family ops for Family 19h Models 00h-0FhYazen Ghannam1-0/+3
2019-11-06EDAC/amd64: Save max number of controllers to family typeYazen Ghannam1-0/+2
2019-09-07EDAC/amd64: Add PCI device IDs for family 17h, model 70hIsaac Vaughn1-0/+3
2019-08-23EDAC/amd64: Support asymmetric dual-rank DIMMsYazen Ghannam1-1/+2
2019-08-23EDAC/amd64: Cache secondary Chip Select registersYazen Ghannam1-0/+4
2019-08-22EDAC/amd64: Support more than two controllers for chip selects handlingYazen Ghannam1-2/+3
2019-04-25Revert "EDAC/amd64: Support more than two controllers for chip select handling"Borislav Petkov1-3/+2
2019-03-27EDAC/amd64: Support more than two controllers for chip select handlingYazen Ghannam1-2/+3
2019-03-27EDAC/amd64: Recognize x16 symbol sizeYazen Ghannam1-1/+1
2019-03-27EDAC/amd64: Support more than two Unified Memory ControllersYazen Ghannam1-4/+2
2019-03-27EDAC/amd64: Add Family 17h Model 30h PCI IDsYazen Ghannam1-0/+3
2018-08-27EDAC, amd64: Add Family 17h, models 10h-2fh supportMichael Jin1-0/+3
2017-02-14EDAC, amd64: Bump driver versionBorislav Petkov1-1/+1
2017-01-28EDAC, amd64: Add x86cpuid sanity check during initYazen Ghannam1-0/+1
2017-01-28EDAC, amd64: Remove unused printing macrosYazen Ghannam1-6/+0
2016-12-15edac: rename edac_core.h to edac_mc.hMauro Carvalho Chehab1-1/+1
2016-12-01EDAC, amd64: Improve amd64-specific printing macrosBorislav Petkov1-2/+2
2016-11-29EDAC, amd64: Define and register UMC error decode functionYazen Ghannam1-0/+2
2016-11-29EDAC, amd64: Add Fam17h debug outputYazen Ghannam1-0/+6
2016-11-28EDAC, amd64: Add Fam17h scrubber supportYazen Ghannam1-0/+2
2016-11-28EDAC, amd64: Read MC registers on AMD Fam17hYazen Ghannam1-0/+13
2016-11-28EDAC, amd64: Reserve correct PCI devices on AMD Fam17hYazen Ghannam1-1/+1
2016-11-24EDAC, amd64: Add AMD Fam17h family type and opsYazen Ghannam1-1/+10
2016-11-24EDAC, amd64: Extend ecc_enabled() to Fam17hYazen Ghannam1-0/+16
2016-05-09EDAC, amd64_edac: Drop pci_register_driver() useBorislav Petkov1-1/+1
2015-09-29EDAC, amd64_edac: Update copyright and remove changelogAravind Gopalakrishnan1-55/+1
2015-09-29EDAC, amd64_edac: Extend scrub rate support to F15hM60hAravind Gopalakrishnan1-0/+2
2015-02-23EDAC: amd64: Use static attribute groupsTakashi Iwai1-22/+2
2014-10-30amd64_edac: Add F15h M60h supportAravind Gopalakrishnan1-3/+12
2014-09-23amd64_edac: Modify usage of amd64_read_dct_pci_cfg()Aravind Gopalakrishnan1-5/+0
2014-02-27amd64_edac: Add support for newer F16h modelsAravind Gopalakrishnan1-0/+3
2013-10-22bitops: Introduce a more generic BITMASK macroChen, Gong1-8/+0
2013-08-12amd64_edac: Get rid of boot_cpu_data accessesBorislav Petkov1-1/+3
2013-08-12amd64_edac: Add ECC decoding support for newer F15h modelsAravind Gopalakrishnan1-4/+54
2013-04-19amd64_edac: Add Family 16h supportAravind Gopalakrishnan1-1/+3
2013-01-10amd64_edac: Fix type usage in NB IDs and memory rangesDaniel J Blueman1-3/+3
2013-01-10x86, AMD, NB: Add multi-domain supportDaniel J Blueman1-6/+0
2012-11-28amd64_edac: Use DBAM_DIMM macroBorislav Petkov1-1/+1
2012-11-28amd64_edac: Reorganize error reporting pathBorislav Petkov1-1/+18
2012-11-28amd64_edac: Improve error injectionBorislav Petkov1-4/+19
2012-11-28amd64_edac: Cleanup error injection codeBorislav Petkov1-8/+9
2012-10-30EDAC: Change Boris' email addressBorislav Petkov1-1/+1
2012-06-11amd64_edac: convert sysfs logic to use struct deviceMauro Carvalho Chehab1-7/+22