Age | Commit message (Expand) | Author | Files | Lines |
2024-06-26 | cxl/region: check interleave capability | Yao Xingtao | 1 | -0/+13 |
2024-04-30 | cxl/hdm: Debug, use decoder name function | Ira Weiny | 1 | -2/+1 |
2024-04-30 | cxl/hdm: dev_warn() on unsupported mixed mode decoder | Alison Schofield | 1 | -2/+2 |
2024-04-30 | cxl/hdm: Add debug message for invalid interleave granularity | Huang Ying | 1 | -1/+5 |
2023-12-08 | cxl/hdm: Fix dpa translation locking | Dan Williams | 1 | -2/+1 |
2023-11-23 | cxl/hdm: Fix a benign lockdep splat | Dave Jiang | 1 | -0/+2 |
2023-11-01 | cxl/hdm: Remove broken error path | Dan Williams | 1 | -17/+2 |
2023-11-01 | cxl/hdm: Fix && vs || bug | Dan Carpenter | 1 | -1/+1 |
2023-10-31 | Merge branch 'for-6.7/cxl-commited' into cxl/next | Dan Williams | 1 | -3/+4 |
2023-10-31 | Merge branch 'for-6.7/cxl-rch-eh' into cxl/next | Dan Williams | 1 | -29/+19 |
2023-10-28 | cxl: Add cxl_decoders_committed() helper | Dave Jiang | 1 | -3/+4 |
2023-10-28 | cxl/hdm: Use stored Component Register mappings to map HDM decoder capability | Robert Richter | 1 | -29/+19 |
2023-10-28 | cxl/core/regs: Rename @dev to @host in struct cxl_register_map | Robert Richter | 1 | -1/+1 |
2023-10-06 | cxl/memdev: Fix sanitize vs decoder setup locking | Dan Williams | 1 | -0/+19 |
2023-06-26 | Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxl | Dan Williams | 1 | -2/+2 |
2023-06-26 | cxl/hdm: Default CXL_DEVTYPE_DEVMEM decoders to CXL_DECODER_DEVMEM | Dan Williams | 1 | -9/+26 |
2023-06-26 | cxl/port: Rename CXL_DECODER_{EXPANDER, ACCELERATOR} => {HOSTONLYMEM, DEVMEM} | Dan Williams | 1 | -5/+6 |
2023-06-25 | cxl/core/regs: Add @dev to cxl_register_map | Robert Richter | 1 | -2/+2 |
2023-04-18 | cxl/hdm: Add more HDM decoder debug messages at startup | Dan Williams | 1 | -0/+12 |
2023-04-18 | cxl/port: Scan single-target ports for decoders | Dan Williams | 1 | -2/+3 |
2023-04-18 | cxl/hdm: Use 4-byte reads to retrieve HDM decoder base+limit | Dan Williams | 1 | -7/+13 |
2023-04-18 | cxl/hdm: Fail upon detecting 0-sized decoders | Dan Williams | 1 | -3/+12 |
2023-04-05 | cxl/hdm: Extend DVSEC range register emulation for region enumeration | Dan Williams | 1 | -5/+22 |
2023-04-05 | cxl/hdm: Limit emulation to the number of range registers | Dan Williams | 1 | -36/+46 |
2023-04-05 | cxl/hdm: Skip emulation when driver manages mem_enable | Dan Williams | 1 | -13/+18 |
2023-04-05 | cxl/hdm: Fix double allocation of @cxlhdm | Dan Williams | 1 | -28/+6 |
2023-02-15 | Merge branch 'for-6.3/cxl-rr-emu' into cxl/next | Dan Williams | 1 | -11/+108 |
2023-02-15 | cxl/hdm: Add emulation when HDM decoders are not committed | Dave Jiang | 1 | -0/+29 |
2023-02-15 | cxl/hdm: Create emulated cxl_hdm for devices that do not have HDM decoders | Dave Jiang | 1 | -10/+48 |
2023-02-15 | cxl/hdm: Emulate HDM decoder from DVSEC range registers | Dave Jiang | 1 | -3/+33 |
2023-02-11 | tools/testing/cxl: Define a fixed volatile configuration to parse | Dan Williams | 1 | -1/+2 |
2023-02-11 | cxl/region: Add region autodiscovery | Dan Williams | 1 | -0/+11 |
2023-02-11 | cxl/port: Split endpoint and switch port probe | Dan Williams | 1 | -3/+8 |
2022-12-06 | cxl: update names for interleave ways conversion macros | Dave Jiang | 1 | -3/+3 |
2022-12-06 | cxl: update names for interleave granularity conversion macros | Dave Jiang | 1 | -3/+3 |
2022-12-04 | cxl/pci: Prepare for mapping RAS Capability Structure | Dan Williams | 1 | -1/+2 |
2022-12-04 | cxl/port: Limit the port driver to just the HDM Decoder Capability | Dan Williams | 1 | -14/+18 |
2022-08-06 | cxl/hdm: Fix skip allocations vs multiple pmem allocations | Dan Williams | 1 | -1/+10 |
2022-08-06 | cxl/region: Move HPA setup to cxl_region_attach() | Dan Williams | 1 | -24/+2 |
2022-08-02 | cxl/hdm: Fix DPA reservation vs cxl_endpoint_decoder lifetime | Dan Williams | 1 | -2/+5 |
2022-07-25 | cxl/hdm: Commit decoder state to hardware | Dan Williams | 1 | -0/+227 |
2022-07-25 | cxl/region: Enable the assignment of endpoint decoders to regions | Dan Williams | 1 | -1/+14 |
2022-07-22 | cxl/port: Move dport tracking to an xarray | Dan Williams | 1 | -2/+4 |
2022-07-22 | cxl/hdm: Add support for allocating DPA to an endpoint decoder | Dan Williams | 1 | -0/+180 |
2022-07-22 | cxl/hdm: Track next decoder to allocate | Dan Williams | 1 | -0/+15 |
2022-07-22 | cxl/hdm: Add 'mode' attribute to decoder objects | Dan Williams | 1 | -0/+10 |
2022-07-22 | cxl/hdm: Enumerate allocated DPA | Dan Williams | 1 | -11/+134 |
2022-07-21 | cxl/core: Define a 'struct cxl_endpoint_decoder' | Dan Williams | 1 | -3/+6 |
2022-07-21 | cxl/core: Define a 'struct cxl_switch_decoder' | Dan Williams | 1 | -12/+21 |
2022-07-10 | cxl/hdm: Initialize decoder type for memory expander devices | Dan Williams | 1 | -5/+11 |