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path: root/drivers/clk
AgeCommit message (Expand)AuthorFilesLines
2023-03-22clk: HI655X: select REGMAP instead of depending on itRandy Dunlap1-1/+1
2023-03-11clk: Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled()Chen-Yu Tsai1-0/+11
2023-03-11clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSCDmitry Baryshkov1-6/+1
2023-03-11clk: renesas: cpg-mssr: Remove superfluous check in resume codeGeert Uytterhoeven1-3/+2
2023-03-11clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flagYoshihiro Shimoda3-19/+22
2023-03-11clk: renesas: cpg-mssr: Fix use after free if cpg_mssr_common_init() failedAlexey Khoroshilov1-1/+2
2023-03-11clk: qcom: gcc-qcs404: fix names of the DSI clocks used as parentsDmitry Baryshkov1-4/+4
2023-03-11clk: qcom: gcc-qcs404: disable gpll[04]_out_aux parentsDmitry Baryshkov1-16/+0
2023-02-06clk: Fix pointer casting to prevent oops in devm_clk_release()Uwe Kleine-König1-1/+1
2023-02-06clk: Provide new devm_clk helpers for prepared and enabled clocksUwe Kleine-König1-0/+27
2023-02-06clk: generalize devm_clk_get() a bitUwe Kleine-König1-17/+49
2023-01-18clk: st: Fix memory leak in st_of_quadfs_setup()Xiu Jianfeng1-2/+3
2023-01-18clk: socfpga: Fix memory leak in socfpga_gate_init()Xiu Jianfeng1-1/+4
2023-01-18clk: socfpga: use clk_hw_register for a5/c5Dinh Nguyen3-15/+22
2023-01-18clk: socfpga: clk-pll: Remove unused variable 'rc'Lee Jones1-2/+1
2023-01-18clk: samsung: Fix memory leak in _samsung_clk_register_pll()Xiu Jianfeng1-0/+1
2023-01-18clk: qcom: clk-krait: fix wrong div2 functionsChristian Marangi1-0/+2
2023-01-18clk: imx: replace osc_hdmi with dummyDario Binacchi1-6/+6
2023-01-18clk: imx8mn: correct the usb1_ctrl parent to be usb_busLi Jun1-1/+1
2023-01-18clk: rockchip: Fix memory leak in rockchip_clk_register_pll()Xiu Jianfeng1-0/+1
2023-01-18clk: renesas: r9a06g032: Repair grave increment errorMarek Vasut1-2/+1
2022-10-26clk: bcm2835: Make peripheral PLLC criticalMaxime Ripard1-1/+1
2022-10-26clk: zynqmp: pll: rectify rate rounding in zynqmp_pll_round_rateQuanyang Wang1-16/+15
2022-10-26clk: zynqmp: Fix stack-out-of-bounds in strncpy`Ian Nam1-0/+7
2022-10-26clk: ast2600: BCLK comes from EPLLJoel Stanley1-1/+1
2022-10-26clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probeMiaoqian Lin1-3/+6
2022-10-26clk: bcm2835: fix bcm2835_clock_rate_from_divisor declarationStefan Wahren1-3/+3
2022-10-26clk: mediatek: mt8183: mfgcfg: Propagate rate changes to parentChen-Yu Tsai1-3/+3
2022-10-26clk: tegra20: Fix refcount leak in tegra20_clock_initMiaoqian Lin1-0/+1
2022-10-26clk: tegra: Fix refcount leak in tegra114_clock_initMiaoqian Lin1-0/+1
2022-10-26clk: tegra: Fix refcount leak in tegra210_clock_initMiaoqian Lin1-0/+1
2022-10-26clk: berlin: Add of_node_put() for of_get_parent()Liang He2-2/+9
2022-10-26clk: oxnas: Hold reference returned by of_get_parent()Liang He1-2/+4
2022-10-26clk: meson: Hold reference returned by of_get_parent()Liang He3-3/+12
2022-10-05clk: iproc: Do not rely on node name for correct PLL setupFlorian Fainelli1-4/+8
2022-10-05clk: imx: imx6sx: remove the SET_RATE_PARENT flag for QSPI clocksHan Xu1-2/+2
2022-10-05clk: ingenic-tcu: Properly enable registers before accessing timersAidan MacDonald1-10/+5
2022-09-15clk: bcm: rpi: Fix error handling of raspberrypi_fw_get_rateStefan Wahren1-1/+1
2022-09-15clk: core: Fix runtime PM sequence in clk_core_unprepare()Chen-Yu Tsai1-2/+1
2022-09-15Revert "clk: core: Honor CLK_OPS_PARENT_ENABLE for clk gate ops"Stephen Boyd1-28/+0
2022-09-15clk: core: Honor CLK_OPS_PARENT_ENABLE for clk gate opsChen-Yu Tsai1-0/+28
2022-08-25clk: qcom: ipq8074: dont disable gcc_sleep_clk_srcRobert Marko1-0/+1
2022-08-25clk: rockchip: add sclk_mac_lbtest to rk3188_critical_clocksAlex Bee1-0/+1
2022-08-25clk: qcom: camcc-sdm845: Fix topology around titan_top power domainVladimir Zapolskiy1-0/+4
2022-08-25clk: qcom: ipq8074: set BRANCH_HALT_DELAY flag for UBI clocksRobert Marko1-0/+10
2022-08-25clk: qcom: ipq8074: fix NSS port frequency tablesRobert Marko1-0/+8
2022-08-25clk: qcom: clk-krait: unlock spin after mux completionAnsuel Smith1-1/+6
2022-08-25clk: mediatek: reset: Fix written reset bit offsetRex-BC Chen1-2/+2
2022-08-25clk: renesas: r9a06g032: Fix UART clkgrp bitselRalph Siemsen1-4/+4
2022-05-25clk: at91: generated: consider range when calculating best rateCodrin Ciubotariu1-0/+4