| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2021-03-04 | clk: aspeed: Fix APLL calculate formula from ast2600-A2 | Ryan Chen | 1 | -10/+27 |
| 2021-03-04 | clk: divider: fix initialization with parent_hw | Michael Tretter | 1 | -2/+7 |
| 2021-03-04 | clk: qcom: gcc-msm8998: Fix Alpha PLL type for all GPLLs | AngeloGioacchino Del Regno | 1 | -50/+50 |
| 2021-03-04 | clk: sunxi-ng: h6: Fix clock divider range on some clocks | Andre Przywara | 1 | -4/+4 |
| 2021-03-04 | clk: renesas: r8a779a0: Fix parent of CBFUSA clock | Geert Uytterhoeven | 1 | -1/+1 |
| 2021-03-04 | clk: renesas: r8a779a0: Remove non-existent S2 clock | Geert Uytterhoeven | 1 | -1/+0 |
| 2021-03-04 | clk: sunxi-ng: h6: Fix CEC clock | Andre Przywara | 1 | -1/+1 |
| 2021-03-04 | clk: meson: clk-pll: propagate the error from meson_clk_pll_set_rate() | Martin Blumenstingl | 1 | -2/+3 |
| 2021-03-04 | clk: meson: clk-pll: make "ret" a signed integer | Martin Blumenstingl | 1 | -1/+2 |
| 2021-03-04 | clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL | Martin Blumenstingl | 1 | -1/+1 |
| 2021-02-17 | clk: sunxi-ng: mp: fix parent rate change flag check | Jernej Skrabec | 1 | -1/+1 |
| 2021-02-04 | clk: qcom: gcc-sm250: Use floor ops for sdcc clks | Dmitry Baryshkov | 1 | -2/+2 |
| 2021-02-04 | clk: mmp2: fix build without CONFIG_PM | Arnd Bergmann | 1 | -2/+4 |
| 2021-02-04 | clk: imx: fix Kconfig warning for i.MX SCU clk | Arnd Bergmann | 1 | -2/+0 |
| 2021-01-27 | clk: tegra30: Add hda clock default rates to clock driver | Peter Geis | 1 | -0/+2 |
| 2020-12-30 | clk: tegra: Do not return 0 on failure | Nicolin Chen | 1 | -2/+2 |
| 2020-12-30 | clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9 | Terry Zhou | 1 | -2/+2 |
| 2020-12-30 | clk: ingenic: Fix divider calculation with div tables | Paul Cercueil | 1 | -4/+10 |
| 2020-12-30 | clk: vc5: Use "idt,voltage-microvolt" instead of "idt,voltage-microvolts" | Geert Uytterhoeven | 1 | -2/+2 |
| 2020-12-30 | clk: sunxi-ng: Make sure divider tables have sentinel | Jernej Skrabec | 2 | -0/+2 |
| 2020-12-30 | clk: s2mps11: Fix a resource leak in error handling paths in the probe function | Christophe JAILLET | 1 | -0/+1 |
| 2020-12-30 | clk: at91: sam9x60: remove atmel,osc-bypass support | Alexandre Belloni | 1 | -5/+1 |
| 2020-12-30 | clk: at91: sama7g5: fix compilation error | Claudiu Beznea | 1 | -2/+4 |
| 2020-12-30 | clk: bcm: dvp: Add MODULE_DEVICE_TABLE() | Nicolas Saenz Julienne | 1 | -0/+1 |
| 2020-12-30 | clk: ti: Fix memleak in ti_fapll_synth_setup | Zhang Qilong | 1 | -2/+9 |
| 2020-12-30 | clk: tegra: Fix duplicated SE clock entry | Dmitry Osipenko | 2 | -1/+2 |
| 2020-12-30 | clk: qcom: gcc-sc7180: Use floor ops for sdcc clks | Douglas Anderson | 1 | -2/+2 |
| 2020-12-30 | clk: renesas: r8a779a0: Fix R and OSC clocks | Geert Uytterhoeven | 1 | -3/+10 |
| 2020-12-30 | clk: fsl-sai: fix memory leak | Michael Walle | 1 | -0/+12 |
| 2020-12-30 | clk: meson: Kconfig: fix dependency for G12A | Kevin Hilman | 1 | -0/+1 |
| 2020-12-08 | clk: renesas: r9a06g032: Drop __packed for portability | Geert Uytterhoeven | 1 | -1/+1 |
| 2020-12-08 | clk: imx: scu: fix MXC_CLK_SCU module build break | Dong Aisheng | 1 | -2/+2 |
| 2020-11-05 | clk: imx8m: fix bus critical clk registration | Peng Fan | 5 | -17/+22 |
| 2020-10-29 | clk: define to_clk_regmap() as inline function | Arnd Bergmann | 2 | -2/+9 |
| 2020-10-26 | treewide: Convert macro and uses of __section(foo) to __section("foo") | Joe Perches | 1 | -1/+1 |
| 2020-10-24 | Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc | Linus Torvalds | 8 | -218/+13 |
| 2020-10-22 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 129 | -806/+6817 |
| 2020-10-20 | Merge branches 'clk-ingenic', 'clk-at91', 'clk-kconfig', 'clk-imx', 'clk-qcom... | Stephen Boyd | 54 | -437/+2555 |
| 2020-10-20 | Merge branches 'clk-semicolon', 'clk-axi-clkgen', 'clk-qoriq', 'clk-baikal', ... | Stephen Boyd | 9 | -68/+155 |
| 2020-10-20 | Merge branches 'clk-simplify', 'clk-ti', 'clk-tegra', 'clk-rockchip' and 'clk... | Stephen Boyd | 26 | -104/+1776 |
| 2020-10-20 | Merge branches 'clk-renesas', 'clk-amlogic', 'clk-allwinner', 'clk-samsung', ... | Stephen Boyd | 27 | -134/+1942 |
| 2020-10-20 | clk: imx8mq: Fix usdhc parents order | Abel Vesa | 1 | -2/+2 |
| 2020-10-20 | clk: qcom: gdsc: Keep RETAIN_FF bit set if gdsc is already on | Stephen Boyd | 1 | -0/+8 |
| 2020-10-14 | clk: Restrict CLK_HSDK to ARC_SOC_HSDK | Geert Uytterhoeven | 1 | -1/+1 |
| 2020-10-14 | clk: at91: sam9x60: support only two programmable clocks | Claudiu Beznea | 1 | -1/+1 |
| 2020-10-14 | clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate | Paul Cercueil | 1 | -0/+2 |
| 2020-10-14 | clk: ingenic: Don't tag custom clocks with CLK_SET_RATE_PARENT | Paul Cercueil | 1 | -7/+7 |
| 2020-10-14 | clk: ingenic: Don't use CLK_SET_RATE_GATE for PLL | Paul Cercueil | 1 | -2/+7 |
| 2020-10-14 | clk: ingenic: Use readl_poll_timeout instead of custom loop | Paul Cercueil | 1 | -26/+29 |
| 2020-10-14 | clk: ingenic: Use to_clk_info() macro for all clocks | Paul Cercueil | 1 | -39/+15 |
