Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2016-06-17 | clk: tegra: Squash sor1 safe/brick/src into a single mux | Thierry Reding | 1 | -1/+0 |
2016-04-28 | clk: tegra: Add sor_safe clock | Thierry Reding | 1 | -0/+1 |
2016-04-28 | clk: tegra: Add dpaux1 clock | Thierry Reding | 1 | -0/+1 |
2016-02-02 | clk: tegra: Add the APB2APE audio clock on Tegra210 | Jon Hunter | 1 | -0/+1 |
2015-12-17 | clk: tegra: Add support for Tegra210 clocks | Rhyland Klein | 1 | -0/+7 |
2015-11-20 | clk: tegra: periph: Add new periph clks and muxes for Tegra210 | Rhyland Klein | 1 | -1/+67 |
2015-02-02 | clk: tegra: Define PLLD_DSI and remove dsia(b)_mux | Mark Zhang | 1 | -2/+0 |
2014-05-23 | clk: tegra: Fix xusb_hs_src clock hierarchy | Andrew Bresticker | 1 | -0/+1 |
2014-02-17 | clk: tegra: fix sdmmc clks on Tegra1x4 | Andrew Bresticker | 1 | -0/+4 |
2013-11-26 | clk: tegra124: Add common clk IDs to clk-id.h | Peter De Schrijver | 1 | -0/+22 |
2013-11-26 | clk: tegra: add header for common tegra clock IDs | Peter De Schrijver | 1 | -0/+213 |