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path: root/drivers/clk/sunxi/clk-sunxi.c
AgeCommit message (Expand)AuthorFilesLines
2014-06-11clk: sun6i: Protect SDRAM gating bitMaxime Ripard1-0/+1
2014-06-11clk: sun6i: Protect CPU clockMaxime Ripard1-0/+1
2014-06-11clk: sunxi: Rework clock protection codeMaxime Ripard1-28/+44
2014-06-11clk: sunxi: Move the GMAC clock to a file of its ownMaxime Ripard1-98/+0
2014-06-11clk: sunxi: Move the 24M oscillator to a file of its ownMaxime Ripard1-57/+0
2014-06-11clk: sunxi: Remove calls to clk_putMaxime Ripard1-6/+2
2014-06-11clk: sunxi: Implement A31 USB clockMaxime Ripard1-0/+6
2014-06-08Merge tag 'clk-for-linus-3.16' of git://git.linaro.org/people/mike.turquette/...Linus Torvalds1-0/+37
2014-05-20clk: sunxi: fix function type for CLK_OF_DECLARERob Herring1-1/+1
2014-05-20clk: sunxi: avoid double DT matchingRob Herring1-2/+1
2014-05-15clk: sunxi: Fixup clk_sunxi_mmc_phase_control to take a clk rather then a hw_clkHans de Goede1-1/+2
2014-05-06clk: sunxi: Implement MMC phase controlEmilio López1-0/+36
2014-03-19clk: sunxi: fix thinko in commentEmilio López1-1/+1
2014-03-19clk: sunxi: fix some calculationsEmilio López1-3/+3
2014-03-19clk: sunxi: fix A20 PLL4 calculationEmilio López1-0/+7
2014-02-18clk: sunxi: Add new clock compatiblesMaxime Ripard1-15/+15
2014-02-18clk: sunxi: Add Allwinner A20/A31 GMAC clock unitChen-Yu Tsai1-0/+96
2014-02-18clk: sunxi: Add support for PLL6 on the A31Maxime Ripard1-0/+45
2014-02-18clk: sunxi: Add USB clock register defintionsRoman Byshko1-0/+12
2014-02-18clk: sunxi: Add support for USB clock-register reset bitsHans de Goede1-0/+71
2014-02-03clk: sunxi: get divs parent clock name from parent factor clockChen-Yu Tsai1-1/+2
2014-02-03clk: sunxi: add names for pll5, pll6 parent clocks to factors_dataChen-Yu Tsai1-9/+18
2014-02-03clk: sunxi: add clock-output-names dt property supportChen-Yu Tsai1-0/+6
2014-01-28clk: sunxi: fix overflow when setting up divided factorsEmilio López1-1/+1
2013-12-29clk: sunxi: Allwinner A20 output clock supportChen-Yu Tsai1-0/+57
2013-12-29clk: sunxi: support better factor DT nodesEmilio López1-0/+9
2013-12-29clk: sunxi: mod0 supportEmilio López1-0/+57
2013-12-29clk: sunxi: add PLL5 and PLL6 supportEmilio López1-0/+230
2013-12-29clk: sunxi: make factors_clk_setup return the clock it registersEmilio López1-7/+8
2013-12-29clk: sunxi: add gating support to PLL1Emilio López1-0/+2
2013-12-29clk: sunxi: clean the magic number of mux parentsEmilio López1-2/+3
2013-12-29clk: sunxi: register factors clocks behind compositeEmilio López1-4/+66
2013-12-02Merge tag 'sunxi-clk-for-3.13' of https://github.com/mripard/linux into clk-n...Mike Turquette1-12/+46
2013-11-10drivers: clk: sunxi: Fix memory leakage in clk-sunxi.cVictor N. Ramos Mello1-11/+17
2013-11-10clk: sunxi: protect core clocks from accidental shutdownEmilio López1-0/+28
2013-09-29clk: sunxi: declare OF clock providerSebastian Hesselbarth1-5/+6
2013-08-28clk: sunxi: Fix incorrect placement of __initconstSachin Kamat1-30/+30
2013-08-26clk: sunxi: Add Allwinner A20 gatesMaxime Ripard1-0/+15
2013-08-26clk: sunxi: Add A31 clocks supportMaxime Ripard1-0/+124
2013-08-26clk: sunxi: Allow to specify the divider width from the dividers dataMaxime Ripard1-11/+13
2013-08-26clk: sunxi: Rename the structure to prepare the addition of sun6iMaxime Ripard1-27/+27
2013-08-26clk: sunxi: fix initialization of basic clocksEmilio López1-8/+3
2013-08-26clk: sunxi: Add A10s gatesMaxime Ripard1-0/+15
2013-08-19clk: add CLK_SET_RATE_NO_REPARENT flagJames Hogan1-1/+2
2013-08-09clk: sunxi: Fix checking return value of clk_register_[composite|factors]Axel Lin1-2/+2
2013-05-30clk: sunxi: "cpu_data" is defined in header files of some architecturesGiacomo A. Catenazzi1-2/+2
2013-05-29clk: sun5i: Add compatibles for Allwinner A13Maxime Ripard1-8/+23
2013-04-12clk: sunxi: Unify oscillator clockEmilio López1-7/+26
2013-04-05clk: sunxi: drop an unnecesary kmallocEmilio López1-1/+1
2013-04-05clk: sunxi: drop CLK_IGNORE_UNUSEDEmilio López1-4/+4
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