kernel/linux.git - Linux kernel stable tree (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2017-04-13	clk: sunxi-ng: a33: gate then ungate PLL CPU clk after rate change	Chen-Yu Tsai	1	-0/+11
2017-04-13	clk: sunxi-ng: Add clk notifier to gate then ungate PLL clocks	Chen-Yu Tsai	2	-0/+61
2017-04-13	clk: sunxi-ng: fix build failure in ccu-sun9i-a80 driver	Tobias Regnery	1	-0/+1
2017-04-13	clk: sunxi-ng: fix build error without CONFIG_RESET_CONTROLLER	Tobias Regnery	1	-0/+1
2017-03-20	clk: sunxi-ng: fix recalc_rate formula of NKMP clocks	Icenowy Zheng	1	-1/+1
2017-03-20	clk: sunxi-ng: Fix div/mult settings for osc12M on A64	Philipp Tomsich	1	-1/+1
2017-03-06	clk: sunxi-ng: sun6i: Fix enable bit offset for hdmi-ddc module clock	Chen-Yu Tsai	1	-1/+1
2017-03-06	clk: sunxi: ccu-sun5i needs nkmp	Arnd Bergmann	1	-0/+1
2017-03-06	clk: sunxi-ng: mp: Adjust parent rate for pre-dividers	Chen-Yu Tsai	1	-0/+8
2017-02-07	clk: sunxi-ng: sun9i-a80: Fix wrong pointer passed to PTR_ERR()	Wei Yongjun	1	-1/+1
2017-02-07	clk: sunxi-ng: select SUNXI_CCU_MULT for sun5i	Arnd Bergmann	1	-0/+1
2017-02-07	clk: sunxi-ng: Check kzalloc() for errors and cleanup error path	Stephen Boyd	1	-0/+15
2017-01-30	clk: sunxi-ng: Add A80 Display Engine CCU	Chen-Yu Tsai	3	-0/+317
2017-01-30	clk: sunxi-ng: Add A80 USB CCU	Chen-Yu Tsai	3	-0/+170
2017-01-30	clk: sunxi-ng: Add A80 CCU	Chen-Yu Tsai	4	-0/+1291
2017-01-30	clk: sunxi-ng: Support separately grouped PLL lock status register	Chen-Yu Tsai	2	-2/+9
2017-01-30	clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENT	Chen-Yu Tsai	1	-1/+12
2017-01-30	clk: sunxi-ng: mux: honor CLK_SET_RATE_NO_REPARENT flag	Chen-Yu Tsai	1	-0/+15
2017-01-30	clk: sunxi-ng: mux: Fix determine_rate for mux clocks with pre-dividers	Chen-Yu Tsai	1	-3/+4
2017-01-27	clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for the GPU	Maxime Ripard	1	-1/+1
2017-01-27	clk: sunxi-ng: Call divider_round_rate if we only have a single parent	Maxime Ripard	1	-0/+12
2017-01-23	clk: sunxi-ng: Add sun5i CCU driver	Maxime Ripard	4	-0/+1100
2017-01-23	clk: sunxi-ng: Implement global pre-divider	Maxime Ripard	2	-1/+9
2017-01-23	clk: sunxi-ng: Implement multiplier maximum	Maxime Ripard	6	-20/+32
2017-01-23	clk: sunxi-ng: mult: Fix minimum in round rate	Maxime Ripard	1	-1/+1
2017-01-23	clk: sunxi-ng: Implement factors offsets	Maxime Ripard	8	-29/+79
2017-01-23	clk: sunxi-ng: multiplier: Add fractional support	Maxime Ripard	2	-0/+10
2017-01-20	clk: sunxi-ng: add support for V3s CCU	Icenowy Zheng	4	-0/+666
2017-01-17	clk: sunxi-ng: a33: Add CLK_SET_RATE_PARENT to ac-dig	Mylène Josserand	1	-1/+1
2017-01-03	clk: sunxi-ng: A31: Fix spdif clock register	Marcus Cooper	1	-2/+2
2017-01-03	clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33	Icenowy Zheng	1	-1/+1
2017-01-03	clk: sunxi-ng: fix PLL_CPUX adjusting on A33	Icenowy Zheng	1	-0/+10
2017-01-03	clk: sunxi-ng: fix PLL_CPUX adjusting on H3	Ondrej Jirman	1	-0/+10
2016-11-24	Merge branch 'clk-fixes' into clk-next	Stephen Boyd	2	-2/+2
2016-11-23	clk: sunxi-ng: enable so-said LDOs for A33 SoC's pll-mipi clock	Icenowy Zheng	1	-1/+1
2016-11-21	clk: sunxi-ng: sun6i-a31: Enable PLL-MIPI LDOs when ungating it	Chen-Yu Tsai	1	-1/+1
2016-11-16	clk: sunxi-ng: Mark structs static and cleanup spaces	Stephen Boyd	1	-6/+6
2016-11-16	Merge tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel...	Stephen Boyd	20	-129/+1200
2016-11-11	clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks	Chen-Yu Tsai	1	-5/+5
2016-11-11	clk: sunxi-ng: sun8i-a23: Set CLK_SET_RATE_PARENT for audio module clocks	Chen-Yu Tsai	1	-3/+3
2016-11-03	clk: sunxi-ng: Add A64 clocks	Maxime Ripard	4	-0/+999
2016-10-25	clk: sunxi-ng: Implement minimum for multipliers	Maxime Ripard	6	-16/+21
2016-10-25	clk: sunxi-ng: Add minimums for all the relevant structures and clocks	Maxime Ripard	5	-23/+50
2016-10-25	clk: sunxi-ng: Finish to convert to structures for arguments	Maxime Ripard	2	-25/+42
2016-10-25	clk: sunxi-ng: Remove the use of rational computations	Maxime Ripard	4	-51/+74
2016-10-20	clk: sunxi-ng: Rename the internal structures	Maxime Ripard	9	-32/+32
2016-10-19	clk: sunxi-ng: sun6i-a31: Force AHB1 clock to use PLL6 as parent	Chen-Yu Tsai	1	-0/+12
2016-09-21	clk: sunxi-ng: Fix reset offset for the A23 and A33	Maxime Ripard	2	-16/+16
2016-09-17	clk: sunxi-ng: sun6i-a31: Fix register offset for mipi-csi clk	Chen-Yu Tsai	1	-1/+1
2016-09-17	clk: sunxi-ng: sun6i-a31: set CLK_SET_RATE_UNGATE for all PLLs	Chen-Yu Tsai	1	-10/+10