| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2019-08-25 | clk: sprd: Select REGMAP_MMIO to avoid compile errors | Chunyan Zhang | 1 | -0/+1 |
| 2019-08-06 | clk: sprd: Add check for return value of sprd_clk_regmap_init() | Chunyan Zhang | 1 | -1/+4 |
| 2018-03-17 | clk: sprd: add RTC gate for SC9860 | Chunyan Zhang | 1 | -0/+76 |
| 2018-01-27 | Merge branch 'clk-divider-container' into clk-next | Stephen Boyd | 1 | -1/+2 |
| 2017-12-22 | clk: sprd: add clocks support for SC9860 | Chunyan Zhang | 3 | -0/+1987 |
| 2017-12-22 | clk: sprd: add adjustable pll support | Chunyan Zhang | 3 | -0/+375 |
| 2017-12-22 | clk: sprd: add composite clock support | Chunyan Zhang | 3 | -0/+112 |
| 2017-12-22 | clk: sprd: add divider clock support | Chunyan Zhang | 3 | -0/+166 |
| 2017-12-22 | clk: sprd: add mux clock support | Chunyan Zhang | 3 | -0/+151 |
| 2017-12-22 | clk: sprd: add gate clock support | Chunyan Zhang | 3 | -0/+171 |
| 2017-12-22 | clk: sprd: Add common infrastructure | Chunyan Zhang | 4 | -0/+141 |
