| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2020-05-27 | clk: sprd: check its parent status before reading gate clock | Chunyan Zhang | 1 | -0/+7 |
| 2020-03-25 | clk: sprd: add gate for pll clocks | Xiaolong Zhang | 1 | -0/+17 |
| 2017-12-22 | clk: sprd: add gate clock support | Chunyan Zhang | 1 | -0/+111 |
