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path: root/drivers/clk/renesas
AgeCommit message (Expand)AuthorFilesLines
2024-06-27clk: renesas: r9a08g045: Add clock, reset and power domain support for I2CClaudiu Beznea1-0/+20
2024-06-27clk: renesas: r8a779h0: Add Audio clocksKuninori Morimoto1-0/+2
2024-06-27clk: renesas: r9a08g045: Add clock, reset and power domain support for the VB...Claudiu Beznea1-0/+6
2024-06-24clk: renesas: Drop "Renesas" from individual driver descriptionsGeert Uytterhoeven1-2/+2
2024-06-24clk: renesas: r8a779h0: Fix PLL2/PLL4 multipliers in commentsGeert Uytterhoeven1-3/+3
2024-06-11clk: renesas: r8a779h0: Add VIN clocksNiklas Söderlund1-0/+16
2024-06-07clk: renesas: rcar-gen2: Use DEFINE_SPINLOCK() for static spinlockGeert Uytterhoeven1-3/+1
2024-06-07clk: renesas: cpg-lib: Use DEFINE_SPINLOCK() for global spinlockGeert Uytterhoeven3-5/+1
2024-06-07clk: renesas: r8a77970: Use common cpg_lockGeert Uytterhoeven1-4/+1
2024-06-03clk: renesas: r8a779h0: Add CSI-2 clocksNiklas Söderlund1-0/+2
2024-06-03clk: renesas: r8a779h0: Add ISPCS clocksNiklas Söderlund1-0/+2
2024-04-25clk: renesas: r9a08g045: Add support for power domainsClaudiu Beznea1-0/+41
2024-04-25clk: renesas: rzg2l: Extend power domain supportClaudiu Beznea2-14/+252
2024-04-25clk: renesas: shmobile: Remove unused CLK_ENABLE_ON_INITGeert Uytterhoeven3-6/+0
2024-04-25clk: renesas: r8a7740: Remove unused div4_clk.flags fieldChristophe JAILLET1-13/+12
2024-04-23clk: renesas: r9a07g043: Add clock and reset entry for PLICLad Prabhakar1-0/+9
2024-04-23clk: renesas: r8a779h0: Add INTC-EX clockCong Dang1-0/+1
2024-04-23clk: renesas: r8a779h0: Add MSIOF clocksCong Dang1-0/+6
2024-04-23clk: renesas: r8a779a0: Fix CANFD parent clockGeert Uytterhoeven1-1/+1
2024-04-08clk: renesas: r8a779h0: Add timer clocksThanh Quan1-0/+9
2024-04-02clk: renesas: r8a779h0: Add SCIF clocksGeert Uytterhoeven1-0/+4
2024-03-26clk: renesas: r9a07g044: Mark resets array as constPaul Barker1-1/+1
2024-03-26clk: renesas: r9a07g043: Mark mod_clks and resets arrays as constPaul Barker1-2/+2
2024-03-26clk: renesas: r8a779h0: Add thermal clockGeert Uytterhoeven1-0/+1
2024-02-20clk: renesas: r8a779h0: Add RPC-IF clockCong Dang1-0/+1
2024-02-20clk: renesas: r8a779h0: Add SYS-DMAC clocksCong Dang1-0/+2
2024-02-20clk: renesas: r8a779h0: Add SDHI clockCong Dang1-0/+1
2024-02-20clk: renesas: r8a779h0: Add EtherAVB clocksCong Dang1-0/+3
2024-02-13clk: renesas: r9a07g04[34]: Fix typo for sel_shdi variableClaudiu Beznea2-6/+6
2024-02-13clk: renesas: r9a07g04[34]: Use SEL_SDHI1_STS status configuration for SD1 muxClaudiu Beznea2-2/+2
2024-02-13clk: renesas: r8a779f0: Correct PFC/GPIO parent clockGeert Uytterhoeven1-1/+1
2024-02-13clk: renesas: r8a779g0: Correct PFC/GPIO parent clocksGeert Uytterhoeven1-5/+6
2024-02-06clk: renesas: r8a779h0: Add I2C clocksCong Dang1-0/+4
2024-02-06clk: renesas: r8a779h0: Add watchdog clockCong Dang1-0/+1
2024-02-06clk: renesas: r8a779h0: Add PFC/GPIO clocksCong Dang1-0/+3
2024-01-31clk: renesas: r8a779g0: Fix PCIe clock nameGeert Uytterhoeven1-1/+1
2024-01-31clk: renesas: cpg-mssr: Add support for R-Car V4MCong Dang5-0/+254
2024-01-31clk: renesas: rcar-gen4: Add support for FRQCRC1Geert Uytterhoeven1-2/+8
2024-01-31clk: renesas: r9a07g043: Add clock and reset entries for CRUBiju Das1-0/+31
2024-01-31clk: renesas: r9a08g045: Add clock and reset support for watchdogClaudiu Beznea1-0/+3
2024-01-23clk: renesas: mstp: Remove obsolete clkdev registrationGeert Uytterhoeven1-13/+3
2024-01-23clk: renesas: cpg-mssr: Ignore all clocks assigned to non-Linux systemKuninori Morimoto1-7/+104
2023-12-13clk: renesas: r9a08g045: Add clock and reset support for ETH0 and ETH1Claudiu Beznea1-0/+10
2023-12-13clk: renesas: rzg2l: Check reset monitor registersClaudiu Beznea1-15/+44
2023-12-13clk: renesas: r9a08g045: Add IA55 pclk and its resetClaudiu Beznea1-0/+3
2023-11-27clk: renesas: rzg2l-cpg: Reuse code in rzg2l_cpg_reset()Claudiu Beznea1-23/+15
2023-11-20clk: renesas: r8a779g0: Add PCIe clocksYoshihiro Shimoda1-0/+2
2023-11-20clk: renesas: r8a779g0: Add EtherTSN clockNiklas Söderlund1-0/+1
2023-10-12clk: renesas: r9a08g045: Add clock and reset support for SDHI1 and SDHI2Claudiu Beznea1-0/+34
2023-10-12clk: renesas: rzg2l: Use %x format specifier to print CLK_ON_R()Claudiu Beznea1-1/+1