Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2023-11-22 | soc: sifive: ccache: Add StarFive JH7100 support | Emil Renner Berthing | 1 | -2/+60 |
2023-11-22 | soc: sifive: shunt ccache driver to drivers/cache | Conor Dooley | 3 | -1/+280 |
2023-10-26 | riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT | Christoph Hellwig | 1 | -1/+1 |
2023-09-01 | cache: Add L2 cache management for Andes AX45MP RISC-V core | Lad Prabhakar | 3 | -0/+227 |