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2022-05-20arm64/sysreg: Generate definitions for CSSELR_EL1Mark Brown2-2/+7
2022-05-20arm64/sysreg: Generate definitions for CPACR_ELxMark Brown2-2/+20
2022-05-20arm64/sysreg: Generate definitions for CONTEXTIDR_ELxMark Brown2-2/+17
2022-05-20arm64/sysreg: Generate definitions for CLIDR_EL1Mark Brown2-1/+16
2022-05-16arm64/sve: Generate ZCR definitionsMark Brown2-7/+18
2022-05-16arm64/sme: Generate defintions for SVCRMark Brown2-4/+6
2022-05-16arm64/sme: Generate SMPRI_EL1 definitionsMark Brown2-3/+5
2022-05-16arm64/sme: Automatically generate SMPRIMAP_EL2 definitionsMark Brown2-1/+19
2022-05-16arm64/sme: Automatically generate SMIDR_EL1 definesMark Brown2-1/+9
2022-05-16arm64/sme: Automatically generate defines for SMCRMark Brown2-10/+20
2022-05-16arm64/sysreg: Support generation of RAZ fieldsMark Brown1-0/+7
2022-05-16arm64/sme: Remove _EL0 from name of SVCR - FIXME sysreg.hMark Brown9-35/+35
2022-05-16arm64/sme: Standardise bitfield names for SVCRMark Brown4-8/+8
2022-05-16arm64/sme: Drop SYS_ from SMIDR_EL1 definesMark Brown2-4/+4
2022-05-16arm64/fp: Rename SVE and SME LEN field name to _WIDTHMark Brown2-4/+4
2022-05-16arm64/fp: Make SVE and SME length register definition match architectureMark Brown1-14/+4
2022-05-16Merge branch 'for-next/sme' into for-next/sysreg-genCatalin Marinas32-130/+1955
2022-05-16arm64/sve: Make kernel FPU protection RT friendlySebastian Andrzej Siewior1-2/+14
2022-05-16arm64/sve: Delay freeing memory in fpsimd_flush_thread()Sebastian Andrzej Siewior1-2/+15
2022-05-15arm64/sysreg: fix odd line spacingMark Rutland1-3/+3
2022-05-15arm64/sysreg: improve comment for regs without fieldsMark Rutland1-1/+1
2022-05-06arm64/sme: More sensibly define the size for the ZA register setMark Brown2-2/+22
2022-05-04arm64/sysreg: Generate definitions for SCTLR_EL1Mark Brown2-38/+71
2022-05-04arm64/sysreg: Generate definitions for TTBRn_EL1Mark Brown2-2/+14
2022-05-04arm64/sysreg: Generate definitions for ID_AA64ISAR0_EL1Mark Brown2-20/+67
2022-05-04arm64/sysreg: Enable automatic generation of system register definitionsMark Brown3-1/+16
2022-05-04arm64: Add sysreg header generation scriptingMark Rutland2-0/+309
2022-05-04arm64/sysreg: Standardise ID_AA64ISAR0_EL1 macro namesMark Brown4-67/+67
2022-05-04arm64: Update name of ID_AA64ISAR0_EL1_ATOMIC to reflect ARMMark Brown3-5/+5
2022-05-04arm64/sysreg: Define bits for previously RES1 fields in SCTLR_EL1Mark Brown1-21/+32
2022-05-04arm64/sysreg: Rename SCTLR_EL1_NTWE/TWI to SCTLR_EL1_nTWE/TWIMark Brown1-3/+3
2022-05-04arm64/mte: Make TCF field values and naming more standardMark Brown3-12/+14
2022-05-04arm64/mte: Make TCF0 naming and field values more standardMark Brown2-7/+7
2022-05-04arm64/sysreg: Introduce helpers for access to sysreg fieldsMark Brown1-0/+6
2022-04-29arm64/sme: Fix NULL check after kzallocWan Jiabing1-1/+1
2022-04-27arm64/sme: Add ID_AA64SMFR0_EL1 to __read_sysreg_by_encoding()Mark Brown1-0/+1
2022-04-22arm64/sme: Provide Kconfig for SMEMark Brown1-0/+11
2022-04-22KVM: arm64: Handle SME host state when running guestsMark Brown2-0/+37
2022-04-22KVM: arm64: Trap SME usage in guestMark Brown2-1/+40
2022-04-22KVM: arm64: Hide SME system registers from guestsMark Brown1-1/+8
2022-04-22arm64/sme: Save and restore streaming mode over EFI runtime callsMark Brown1-6/+42
2022-04-22arm64/sme: Disable streaming mode and ZA when flushing CPU stateMark Brown1-0/+9
2022-04-22arm64/sme: Add ptrace support for ZAMark Brown2-0/+200
2022-04-22arm64/sme: Implement ptrace support for streaming mode SVE registersMark Brown4-59/+200
2022-04-22arm64/sme: Implement ZA signal handlingMark Brown3-3/+180
2022-04-22arm64/sme: Implement streaming SVE signal handlingMark Brown3-13/+53
2022-04-22arm64/sme: Disable ZA and streaming mode when handling signalsMark Brown1-0/+7
2022-04-22arm64/sme: Implement traps and syscall handling for SMEMark Brown7-23/+255
2022-04-22arm64/sme: Implement ZA context switchingMark Brown7-9/+66
2022-04-22arm64/sme: Implement streaming SVE context switchingMark Brown6-23/+136
generated by cgit v1.2.3 (git 2.39.0) at 2025-03-04 01:00:57 +0300