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path: root/arch/x86/events/intel/lbr.c
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2022-12-27perf/x86/lbr: Simplify the exposure check for the LBR_INFO registersLike Xu1-3/+1
2022-12-15Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds1-5/+1
2022-11-09perf/x86/core: Zero @lbr instead of returning -1 in x86_perf_get_lbr() stubSean Christopherson1-5/+1
2022-10-27perf: Rewrite core context handlingPeter Zijlstra1-15/+15
2022-10-20perf/x86/intel/lbr: Use setup_clear_cpu_cap() instead of clear_cpu_cap()Maxim Levitsky1-1/+1
2022-09-29Merge branch 'v6.0-rc7'Peter Zijlstra1-0/+8
2022-08-27perf/x86: Move branch classifierSandipan Das1-273/+0
2022-08-19perf/x86/lbr: Enable the branch type for the Arch LBR by defaultKan Liang1-0/+8
2022-07-20perf/x86/intel/lbr: Fix unchecked MSR access error on HSWKan Liang1-9/+10
2022-04-05perf/core: Add perf_clear_branch_entry_bitfields() helperStephane Eranian1-19/+17
2022-03-01perf: Add irq and exception return branch typesAnshuman Khandual1-2/+2
2022-01-18x86/perf: Avoid warning for Arch LBR without XSAVEAndi Kleen1-0/+3
2022-01-18perf/x86/intel/lbr: Add static_branch for LBR INFO flagsPeter Zijlstra (Intel)1-17/+34
2022-01-18perf/x86/intel/lbr: Support LBR format V7Peter Zijlstra (Intel)1-50/+64
2021-11-11perf/x86/lbr: Reset LBR_SELECT during vlbr resetWanpeng Li1-0/+2
2021-09-13perf: Enable branch record for software eventsSong Liu1-15/+5
2021-07-07Merge tag 'x86-fpu-2021-07-07' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds1-3/+3
2021-06-24perf/x86/intel/lbr: Zero the xstate buffer on allocationThomas Gleixner1-1/+2
2021-06-23x86/fpu/xstate: Sanitize handling of independent featuresThomas Gleixner1-3/+3
2021-06-23x86/fpu: Rename "dynamic" XSTATEs to "independent"Andy Lutomirski1-3/+3
2021-05-18perf/x86/lbr: Remove cpuc->lbr_xsave allocation from atomic contextLike Xu1-6/+20
2021-04-28Merge tag 'perf-core-2021-04-28' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds1-4/+5
2021-04-28Merge tag 'x86_core_for_v5.13' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds1-5/+5
2021-04-19perf/x86: Track pmu in per-CPU cpu_hw_eventsKan Liang1-4/+5
2021-03-18x86: Fix various typos in commentsIngo Molnar1-1/+1
2021-03-15perf/x86/intel/ds: Check return values of insn decoder functionsBorislav Petkov1-5/+5
2020-12-15Merge tag 'perf-core-2020-12-14' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds1-1/+1
2020-12-09perf/x86/intel/lbr: Fix the return type of get_lbr_cycles()Kan Liang1-1/+1
2020-10-26perf/x86: Avoid TIF_IA32 when checking 64bit modeGabriel Krisman Bertazi1-1/+1
2020-08-24treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva1-1/+1
2020-07-08perf/x86/intel/lbr: Support XSAVES for arch LBR readKan Liang1-1/+39
2020-07-08perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switchKan Liang1-5/+74
2020-07-08perf/x86: Remove task_ctx_sizeKan Liang1-1/+0
2020-07-08perf/x86/intel/lbr: Create kmem_cache for the LBR context dataKan Liang1-2/+19
2020-07-08perf/x86/intel/lbr: Support Architectural LBRKan Liang1-11/+240
2020-07-08perf/x86/intel/lbr: Factor out intel_pmu_store_lbrKan Liang1-26/+56
2020-07-08perf/x86/intel/lbr: Factor out rdlbr_all() and wrlbr_all()Kan Liang1-16/+50
2020-07-08perf/x86/intel/lbr: Mark the {rd,wr}lbr_{to,from} wrappers __always_inlineKan Liang1-4/+4
2020-07-08perf/x86/intel/lbr: Unify the stored format of LBR informationKan Liang1-10/+10
2020-07-08perf/x86/intel/lbr: Support LBR_CTLKan Liang1-0/+43
2020-07-08perf/x86/intel/lbr: Use dynamic data structure for task_ctxKan Liang1-33/+26
2020-07-08perf/x86/intel/lbr: Factor out a new struct for generic optimizationKan Liang1-17/+21
2020-07-08perf/x86/intel/lbr: Add the function pointers for LBR save and restoreKan Liang1-30/+49
2020-07-08perf/x86/intel/lbr: Add a function pointer for LBR readKan Liang1-6/+3
2020-07-08perf/x86/intel/lbr: Add a function pointer for LBR resetKan Liang1-17/+3
2020-07-02perf/x86: Keep LBR records unchanged in host context for guest usageLike Xu1-5/+26
2020-07-02perf/x86: Add constraint to create guest LBR event without hw counterLike Xu1-0/+4
2020-07-02perf/x86/lbr: Add interface to get LBR informationLike Xu1-0/+20
2020-02-11perf/x86/intel: Output LBR TOS information correctlyKan Liang1-3/+9
2020-02-11perf/core: Add new branch sample type for HW index of raw branch recordsKan Liang1-0/+3
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