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path: root/arch/riscv/include/asm/cmpxchg.h
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2025-10-01Merge tag 'bpf-next-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/bp...Linus Torvalds1-2/+4
2025-09-19riscv: errata: Fix the PAUSE Opcode for MIPS P8700Djordje Todorovic1-1/+2
2025-08-15riscv: Separate toolchain support dependency from RISCV_ISA_ZACASPu Lehui1-2/+4
2025-06-05riscv: xchg: Prefetch the destination word for sc.wGuo Ren1-1/+3
2025-03-18riscv: Implement smp_cond_load8/16() with ZawrsGuo Ren1-3/+35
2025-02-15riscv/atomic: Do proper sign extension also for unsigned in arch_cmpxchgAndreas Schwab1-1/+1
2024-11-11riscv: Implement xchg8/16() using ZabhaAlexandre Ghiti1-24/+41
2024-11-11riscv: Implement arch_cmpxchg128() using ZacasAlexandre Ghiti1-0/+38
2024-11-11riscv: Improve zacas fully-ordered cmpxchg()Alexandre Ghiti1-28/+64
2024-11-11riscv: Implement cmpxchg8/16() using ZabhaAlexandre Ghiti1-29/+49
2024-11-11riscv: Implement cmpxchg32/64() using ZacasAlexandre Ghiti1-17/+31
2024-11-11riscv: Do not fail to build on byte/halfword operations with ZawrsAlexandre Ghiti1-0/+5
2024-07-20Merge tag 'riscv-for-linus-6.11-mw1' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-0/+58
2024-07-12Merge patch series "riscv: Apply Zawrs when available"Palmer Dabbelt1-0/+58
2024-07-12riscv: Add Zawrs support for spinlocksChristoph Müllner1-0/+58
2024-05-30riscv: Fix fully ordered LR/SC xchg[8|16]() implementationsAlexandre Ghiti1-10/+12
2024-04-30Merge patch series "riscv: enable lockless lockref implementation"Palmer Dabbelt1-0/+18
2024-04-29Merge patch series "Rework & improve riscv cmpxchg.h and atomic.h"Palmer Dabbelt1-280/+124
2024-04-24riscv: cmpxchg: implement arch_cmpxchg64_{relaxed|acquire|release}Jisheng Zhang1-0/+18
2024-04-08riscv/cmpxchg: Implement xchg for variables of size 1 and 2Leonardo Bras1-0/+31
2024-04-08riscv/cmpxchg: Implement cmpxchg for variables of size 1 and 2Leonardo Bras1-0/+34
2024-04-08riscv/cmpxchg: Deduplicate cmpxchg() asm and macrosLeonardo Bras1-162/+33
2024-04-08riscv/cmpxchg: Deduplicate xchg() asm functionsLeonardo Bras1-115/+23
2024-03-20riscv/barrier: Consolidate fence definitionsEric Chan1-1/+0
2024-03-20riscv/barrier: Define RISCV_FULL_BARRIEREric Chan1-2/+2
2023-04-29locking/arch: Rename all internal __xchg() names to __arch_xchg()Andrzej Hajda1-2/+2
2022-05-21riscv: atomic: Cleanup unnecessary definitionGuo Ren1-12/+0
2021-05-26locking/atomic: riscv: move to ARCH_ATOMICMark Rutland1-17/+17
2020-06-12riscv/atomic: Fix sign extension for RV64INathan Huckleberry1-4/+4
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286Thomas Gleixner1-9/+1
2018-04-03riscv/atomic: Strengthen implementations with fencesAndrea Parri1-71/+320
2017-09-27RISC-V: Atomic and Locking CodePalmer Dabbelt1-0/+134