Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2023-03-17 | RISC-V: fix taking the text_mutex twice during sifive errata patching | Conor Dooley | 1 | -1/+1 |
2023-03-17 | RISC-V: take text_mutex during alternative patching | Conor Dooley | 1 | -0/+3 |
2022-07-08 | riscv: don't warn for sifive erratas in modules | Heiko Stuebner | 1 | -1/+2 |
2022-05-12 | riscv: add memory-type errata for T-Head | Heiko Stuebner | 1 | -1/+6 |
2022-05-12 | riscv: implement module alternatives | Heiko Stuebner | 1 | -5/+9 |
2022-05-12 | riscv: allow different stages with alternatives | Heiko Stuebner | 1 | -1/+2 |
2021-04-26 | riscv: sifive: Apply errata "cip-1200" patch | Vincent Chen | 1 | -0/+18 |
2021-04-26 | riscv: sifive: Apply errata "cip-453" patch | Vincent Chen | 1 | -0/+20 |
2021-04-26 | riscv: sifive: Add SiFive alternative ports | Vincent Chen | 1 | -0/+68 |