Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2021-06-12 | riscv: Fix BUILTIN_DTB for sifive and microchip soc | Alexandre Ghiti | 1 | -0/+1 |
2021-01-08 | riscv: dts: add initial board data for the SiFive HiFive Unmatched | Yash Shah | 1 | -1/+2 |
2019-07-01 | arch: riscv: add config option for building SiFive's SoC resource | Loys Ollivier | 1 | -1/+1 |
2019-06-17 | riscv: dts: add initial board data for the SiFive HiFive Unleashed | Paul Walmsley | 1 | -0/+2 |