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path: root/arch/mips/mm/c-r4k.c
AgeCommit message (Expand)AuthorFilesLines
2019-02-07MIPS: Delete unused flush_cache_sigtramp()Paul Burton1-116/+0
2019-02-04MIPS: MemoryMapID (MMID) SupportPaul Burton1-0/+3
2019-02-04MIPS: mm: Consolidate drop_mmu_context() has-ASID checksPaul Burton1-4/+1
2019-02-04MIPS: mm: Remove redundant drop_mmu_context() cpu argumentPaul Burton1-1/+1
2018-12-04mips: annotate implicit fall throughsMathieu Malaterre1-0/+2
2018-11-21MIPS: c-r4k: Add r4k_blast_scache_node for Loongson-3Huacai Chen1-7/+37
2018-11-20MIPS: Loongson: Add Loongson-3A R2.1 basic supportHuacai Chen1-1/+1
2018-09-20MIPS: don't select DMA_MAYBE_COHERENT from DMA_PERDEV_COHERENTChristoph Hellwig1-9/+8
2018-07-26MIPS: WARN_ON invalid DMA cache maintenance, not BUG_ONPaul Burton1-2/+4
2018-06-24MIPS: Set MIPS_IC_SNOOPS_REMOTE for systems with CMPaul Burton1-0/+8
2018-06-24MIPS: simplify CONFIG_DMA_NONCOHERENT ifdefsChristoph Hellwig1-2/+2
2018-05-15MIPS: c-r4k: Fix data corruption related to cache coherenceNeilBrown1-3/+6
2017-08-30MIPS: CPS: Have asm/mips-cps.h include CM & CPC headersPaul Burton1-1/+1
2017-06-28MIPS: Probe the I6500 CPUPaul Burton1-0/+2
2017-03-22MIPS: c-r4k: Fix Loongson-3's vcache/scache waysize calculationHuacai Chen1-0/+2
2017-01-03MIPS: c-r4k: Treat physically indexed dcaches as not aliasingPaul Burton1-0/+4
2017-01-03MIPS: c-r4k: Treat I6400 dcache as though physically indexedPaul Burton1-1/+1
2016-10-06MIPS: Support per-device DMA coherencePaul Burton1-0/+4
2016-10-06MIPS: Sanitise coherentio semanticsPaul Burton1-1/+2
2016-10-05MIPS: mm: Audit and remove any unnecessary uses of module.hPaul Gortmaker1-1/+1
2016-10-05MIPS: c-r4k: Fix flush_icache_range() for EVAJames Hogan1-8/+35
2016-10-04MIPS: c-r4k: Split user/kernel flush_icache_range()James Hogan1-0/+2
2016-10-04MIPS: c-r4k: Drop bc_wback_inv() from icache flushJames Hogan1-11/+0
2016-09-13MIPS: c-r4k: Fix size calc when avoiding IPIs for small icache flushesPaul Burton1-1/+1
2016-08-06Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds1-57/+227
2016-07-29MIPS: c-r4k: Use SMP calls for CM indexed cache opsJames Hogan1-1/+1
2016-07-29MIPS: c-r4k: Avoid small flush_icache_range SMP callsJames Hogan1-0/+21
2016-07-29MIPS: c-r4k: Local flush_icache_range cache op overrideJames Hogan1-6/+18
2016-07-29MIPS: c-r4k: Split r4k_flush_kernel_vmap_range()James Hogan1-8/+17
2016-07-29MIPS: c-r4k: Exclude sibling CPUs in SMP callsJames Hogan1-4/+13
2016-07-29MIPS: c-r4k: Fix valid ASID optimisationJames Hogan1-13/+35
2016-07-29MIPS: c-r4k: Add r4k_on_each_cpu cache op type argJames Hogan1-19/+51
2016-07-29MIPS: c-r4k: Avoid dcache flush for sigtrampsJames Hogan1-6/+10
2016-07-29MIPS: c-r4k: Fix sigtramp SMP call to use kmapJames Hogan1-6/+69
2016-07-29MIPS: SMP: Clear ASID without confusing has_valid_asid()James Hogan1-0/+4
2016-07-06MIPS: Remove cpu_has_safe_index_cacheopsRalf Baechle1-9/+3
2016-06-16MIPS: Add define for Config.VI (virtual icache) bitJames Hogan1-1/+1
2016-05-13MIPS: remove aliasing alignment if HW has antialising supportLeonid Yegoshin1-1/+1
2016-05-13MIPS: Loongson-3: Introduce CONFIG_LOONGSON3_ENHANCEMENTHuacai Chen1-0/+2
2016-05-13MIPS: Loongson-3: Set cache flush handlers to cache_noopHuacai Chen1-0/+14
2016-05-13MIPS: Loongson: Add Loongson-3A R2 basic supportHuacai Chen1-0/+27
2016-05-13MIPS: BMIPS: local_r4k___flush_cache_all needs to blast S-cacheFlorian Fainelli1-0/+5
2016-05-13MIPS: BMIPS: Clear MIPS_CACHE_ALIASES earlierFlorian Fainelli1-2/+2
2016-05-13MIPS: BMIPS: BMIPS5000 has I cache filing from D cacheFlorian Fainelli1-0/+4
2016-05-13MIPS: Add M6250 cases to CPU switch statementsPaul Burton1-0/+1
2016-05-13MIPS: Add P6600 cases to CPU switch statementsPaul Burton1-0/+1
2016-05-09MIPS: I6400: Icache fills from dcacheJames Hogan1-0/+1
2016-05-09MIPS: c-r4k: Sync icache when it fills from dcacheJames Hogan1-2/+9
2016-01-16mm: differentiate page_mapped() from page_mapcount() for compound pagesKirill A. Shutemov1-1/+2
2015-08-26MIPS: Add cases for CPU_I6400Markos Chandras1-0/+1