Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2019-01-23 | MIPS: Loongson32: Revert ISA level to MIPS32R2 | Jiaxun Yang | 1 | -1/+1 |
2019-01-22 | MIPS: Loongson32: Set load address to 0x80200000 | Jiaxun Yang | 1 | -1/+1 |
2018-07-31 | MIPS: Loongson: Merge load addresses | 谢致邦 (XIE Zhibang) | 1 | -2/+1 |
2018-07-31 | MIPS: Loongson: Set Loongson32 to MIPS32R1 | 谢致邦 (XIE Zhibang) | 1 | -4/+1 |
2016-10-04 | MIPS: Loongson1C: Add board support | Yang Ling | 1 | -0/+1 |
2015-06-21 | MIPS: Loongson: Naming style cleanup and rework | Huacai Chen | 1 | -0/+7 |