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path: root/arch/arm64/include/asm/tlbflush.h
AgeCommit message (Expand)AuthorFilesLines
2018-04-08arm64: mm: Invalidate both kernel and user ASIDs when performing TLBIWill Deacon1-2/+14
2016-09-28arm64: tlbflush.h: add __tlbi() macroMark Rutland1-8/+26
2015-10-07arm64: tlb: remove redundant barrier from __flush_tlb_pgtableWill Deacon1-1/+0
2015-10-07arm64: tlbflush: remove redundant ASID casts to (unsigned long)Will Deacon1-5/+4
2015-10-07arm64: flush: use local TLB and I-cache invalidationWill Deacon1-0/+8
2015-07-28arm64: Use last level TLBI for user pte changesCatalin Marinas1-5/+16
2015-07-28arm64: Clean up __flush_tlb(_kernel)_range functionsCatalin Marinas1-26/+21
2015-07-27arm64: move update_mmu_cache() into asm/pgtable.hWill Deacon1-14/+0
2015-06-12arm64: mm: remove reference to tlb.S from comment blockVladimir Murzin1-2/+0
2015-03-14arm64: Invalidate the TLB corresponding to intermediate page table levelsCatalin Marinas1-0/+13
2015-02-26arm64: mm: remove unused functions and variable protoypesYingjoe Chen1-5/+0
2014-07-24arm64: fix soft lockup due to large tlb flush rangeMark Salter1-3/+26
2014-07-24arm64: Fix barriers used for page table modificationsCatalin Marinas1-2/+3
2014-05-09arm64: barriers: make use of barrier options with explicit barriersWill Deacon1-7/+7
2014-05-09arm64: mm: Optimise tlb flush logic where we have >4K granuleSteve Capper1-5/+25
2013-06-14ARM64: mm: THP support.Steve Capper1-0/+2
2012-09-17arm64: TLB maintenance functionalityCatalin Marinas1-0/+122