summaryrefslogtreecommitdiff
path: root/arch/arm64/include/asm/spinlock.h
AgeCommit message (Expand)AuthorFilesLines
2018-04-26arm64: spinlock: Fix theoretical trylock() A-B-A with LSE atomicsWill Deacon1-2/+2
2017-09-04Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds1-9/+2
2017-08-17arch: Remove spin_unlock_wait() arch-specific definitionsPaul E. McKenney1-53/+5
2017-08-10locking: Remove smp_mb__before_spinlock()Peter Zijlstra1-9/+0
2017-08-10locking: Introduce smp_mb__after_spinlock()Peter Zijlstra1-0/+2
2016-10-03Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds1-16/+11
2016-09-09arm64: lse: convert lse alternatives NOP padding to use __nopsWill Deacon1-16/+11
2016-09-09arm64: spinlocks: implement smp_mb__before_spinlock() as smp_mb()Will Deacon1-0/+10
2016-06-15arm64: spinlock: Ensure forward-progress in spin_unlock_waitWill Deacon1-3/+24
2016-06-15arm64: spinlock: fix spin_unlock_wait for LSE atomicsWill Deacon1-3/+7
2016-06-15arm64: spinlock: order spin_{is_locked,unlock_wait} against local locksWill Deacon1-0/+7
2015-12-03arm64: spinlock: serialise spin_unlock_wait against concurrent lockersWill Deacon1-2/+21
2015-07-28arm64: spinlock: fix ll/sc unlock on big-endian systemsWill Deacon1-1/+1
2015-07-27arm64: locks: patch in lse instructions when supported by the CPUWill Deacon1-29/+108
2015-07-27arm64: rwlocks: don't fail trylock purely due to contentionWill Deacon1-6/+8
2014-12-18arm64/spinlock: Replace ACCESS_ONCE READ_ONCEChristian Borntraeger1-2/+2
2014-02-07arm64: asm: remove redundant "cc" clobbersWill Deacon1-5/+5
2013-10-24arm64: lockref: add support for lockless lockrefs using cmpxchgWill Deacon1-2/+6
2013-10-24arm64: locks: introduce ticket-based spinlock implementationWill Deacon1-26/+53
2013-06-07arm64: spinlock: retry trylock operation if strex fails on free lockCatalin Marinas1-1/+2
2013-02-11arm64: atomics: fix grossly inconsistent asm constraints for exclusivesWill Deacon1-39/+39
2012-09-17arm64: SMP supportCatalin Marinas1-0/+202