Age | Commit message (Expand) | Author | Files | Lines |
2024-03-15 | Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm | Linus Torvalds | 1 | -0/+1 |
2024-03-07 | arm64/cpufeature: Hook new identification registers up to cpufeature | Mark Brown | 1 | -0/+3 |
2024-02-08 | arm64: cpufeature: Add ID_AA64MMFR4_EL1 handling | Marc Zyngier | 1 | -0/+1 |
2023-12-06 | arm64: setup: Switch over to GENERIC_CPU_DEVICES using arch_register_cpu() | James Morse | 1 | -1/+0 |
2023-09-25 | arm64/sve: Remove SMCR pseudo register from cpufeature code | Mark Brown | 1 | -3/+0 |
2023-09-25 | arm64/sve: Remove ZCR pseudo register from cpufeature code | Mark Brown | 1 | -3/+0 |
2023-06-06 | arm64: cpufeature: add system register ID_AA64MMFR3 | Joey Gouly | 1 | -0/+1 |
2022-06-23 | arm64/sme: Expose SMIDR through sysfs | Mark Brown | 1 | -0/+1 |
2022-04-22 | arm64/sme: Identify supported SME vector lengths at boot | Mark Brown | 1 | -0/+3 |
2022-04-22 | arm64/sme: Basic enumeration support | Mark Brown | 1 | -0/+1 |
2021-12-13 | arm64: add ID_AA64ISAR2_EL1 sys register | Joey Gouly | 1 | -0/+1 |
2021-06-11 | arm64: cpuinfo: Split AArch32 registers out into a separate struct | Will Deacon | 1 | -21/+25 |
2021-05-27 | arm64: Check if GMID_EL1.BS is the same on all CPUs | Catalin Marinas | 1 | -0/+1 |
2021-05-27 | arm64: Change the cpuinfo_arm64 member type for some sysregs to u64 | Catalin Marinas | 1 | -5/+5 |
2020-05-21 | arm64/cpuinfo: Add ID_MMFR4_EL1 into the cpuinfo_arm64 context | Anshuman Khandual | 1 | -0/+1 |
2020-05-21 | arm64/cpufeature: Introduce ID_MMFR5 CPU register | Anshuman Khandual | 1 | -0/+1 |
2020-05-21 | arm64/cpufeature: Introduce ID_DFR1 CPU register | Anshuman Khandual | 1 | -0/+1 |
2020-05-21 | arm64/cpufeature: Introduce ID_PFR2 CPU register | Anshuman Khandual | 1 | -0/+1 |
2020-01-15 | arm64: Introduce ID_ISAR6 CPU register | Anshuman Khandual | 1 | -0/+1 |
2019-06-19 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234 | Thomas Gleixner | 1 | -12/+1 |
2017-11-03 | arm64/sve: Probe SVE capabilities and usable vector lengths | Dave Martin | 1 | -0/+4 |
2016-07-12 | arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs | Steve Capper | 1 | -0/+2 |
2016-02-18 | arm64: add ARMv8.2 id_aa64mmfr2 boiler plate | James Morse | 1 | -0/+1 |
2015-10-21 | arm64: Consolidate CPU Sanity check to CPU Feature infrastructure | Suzuki K. Poulose | 1 | -1/+2 |
2015-10-21 | arm64: Keep track of CPU feature registers | Suzuki K. Poulose | 1 | -0/+1 |
2015-10-21 | arm64: Move mixed endian support detection | Suzuki K. Poulose | 1 | -0/+2 |
2015-01-07 | arm64: sanity checks: add missing AArch32 registers | Mark Rutland | 1 | -0/+5 |
2014-11-25 | arm64: sanity checks: add ID_AA64DFR{0,1}_EL1 | Mark Rutland | 1 | -0/+2 |
2014-07-18 | arm64: cpuinfo: record cpu system register values | Mark Rutland | 1 | -0/+59 |