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2025-07-29Merge tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds43-165/+5495
Pull SoC devicetree updates from Arnd Bergmann: "There are a few new variants of existing chips: - mt6572 is an older mobile phone chip from mediatek that was extremely popular a decade ago but never got upstreamed until now - exynos2200 is a recent high-end mobile phone chip used in a few Samsung phones like the Galaxy S22 - Renesas R-Car V4M-7 (R8A779H2) is an updated version of R-Car V4M (R8A779H0) and used in automotive applications - Tegra264 is a new chip from NVIDIA, but support is fairly minimal for now, and not much information is public about it There are five more chips in a separate branch, as those are new chip families that I merged along with the necessary infrastructure. New board support is not that exciting, with a total of 33 newly added machines here: - Evaluation platforms for the chips above, plus TI am62d2 and Sophgo sg2042 - Six 32-bit industrial boards based on stm32, imx6 and am33 chips, plus eight 64-bit rockchips rk33xx/rk35xx, am62d2, t527, imx8 and imx95 - Two newly added ASPEED BMC based motherboards, and one that got removed - Phones and Tablets based on 32-bit mt6572, tegra30 and 64-bit msm8976 SoCs - Three Laptops based on Mediatek mt8186 and Qualcomm Snapdragon X1 - A set-top box based on Amlogic meson-gxm Updates for existing machines are spread over all the above families. One notable change here is support for the RP1 I/O chip used in Raspberry Pi 5" * tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (606 commits) riscv: dts: sophgo: fix mdio node name for CV180X riscv: dts: sophgo: sophgo-srd3-10: reserve uart0 device riscv: dts: sophgo: add Sophgo SG2042_EVB_V2.0 board device tree riscv: dts: sophgo: add Sophgo SG2042_EVB_V1.X board device tree dt-bindings: riscv: add Sophgo SG2042_EVB_V1.X/V2.0 bindings riscv: dts: sophgo: add ethernet GMAC device for sg2042 riscv: dts: sophgo: Enable ethernet device for Huashan Pi riscv: dts: sophgo: Add mdio multiplexer device for cv18xx riscv: dts: sophgo: Add ethernet device for cv18xx riscv: dts: sophgo: sg2044: add pmu configuration riscv: dts: sophgo: sg2044: add ziccrse extension riscv: dts: sophgo: add zfh for sg2042 riscv: dts: sophgo: add ziccrse for sg2042 riscv: dts: sophgo: Add xtheadvector to the sg2042 devicetree riscv: dts: sophgo: sg2044: add PCIe device support for SG2044 riscv: dts: sophgo: sg2044: add MSI device support for SG2044 riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC dt-bindings: soc: sophgo: Move SoCs/boards from riscv into soc, add SG2000 riscv: dts: sophgo: sg2044: Add missing riscv,cbop-block-size property ...
2025-07-03arm64: dts: qcom: sm8150: Drop unrelated clocks from PCIe hostsKonrad Dybcio1-12/+4
The TBU clock belongs to the Translation Buffer Unit, part of the SMMU. The ref clock is already being driven upstream through some of the branches. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250521-topic-8150_pcie_drop_clocks-v1-4-3d42e84f6453@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-03arm64: dts: qcom: sc8180x: Drop unrelated clocks from PCIe hostsKonrad Dybcio1-24/+8
The TBU clock belongs to the Translation Buffer Unit, part of the SMMU. The ref clock is already being driven upstream through some of the branches. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250521-topic-8150_pcie_drop_clocks-v1-3-3d42e84f6453@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-26arm64: dts: qcom: x1-asus-zenbook: support soundAleksandrs Vinarskis1-0/+194
Works: * Both speakers * Both MICs * Headphones jack, L/R channels * Headphones jack, MIC Now working/untested: * Sound over DisplayPort * Sound over HDMI Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250623113709.21184-3-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-26arm64: dts: qcom: x1-asus-zenbook: fixup GPU nodesAleksandrs Vinarskis3-5/+9
It appears not the latest version of the patch was merged. Align with latest upstreamed version by correcting GPU enable location and typo in GPU firmware path for x1p42100 variant. Fixes: 6516961352a1 ("arm64: dts: qcom: Add support for X1-based Asus Zenbook A14") Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250623113709.21184-2-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-25arm64: dts: qcom: sm6115: add debug UART pinsBartosz Golaszewski1-0/+9
We should not rely on the bootloader to set up the pinmux of the debug UART port. Let's add pin definitions for uart4 to tlmm and bind them to the relevant device node. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20250625152839.193672-1-brgl@bgdev.pl Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-19arm64: dts: qcom: sm8650: add iris DT nodeNeil Armstrong4-0/+105
Add DT entries for the sm8650 iris decoder. Since the firmware is required to be signed, only enable on Qualcomm development boards where the firmware is available. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250613-topic-sm8x50-upstream-iris-8650-dt-v4-1-35ea7952f2d2@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: msm8976-longcheer-l9360: Add initial device treeAndré Apitzsch2-0/+491
This dts adds support for BQ Aquaris X5 Plus (Longcheer L9360) released in 2016. Add a device tree with initial support for: - GPIO keys - NFC - SDHCI - Status LED - Touchscreen Signed-off-by: André Apitzsch <git@apitzsch.eu> Link: https://lore.kernel.org/r/20250615-bqx5plus-v2-4-72b45c84237d@apitzsch.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: msm8976: Add sdc2 GPIOsAndré Apitzsch1-0/+36
Downstream vendor code for reference: https://git.codelinaro.org/clo/la/kernel/msm-3.10/-/blob/LA.BR.1.3.7.c26/arch/arm/boot/dts/qcom/msm8976-pinctrl.dtsi#L223-263 Signed-off-by: André Apitzsch <git@apitzsch.eu> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250615-bqx5plus-v2-3-72b45c84237d@apitzsch.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: msm8976: Make blsp_dma controlled-remotelyAndré Apitzsch1-0/+2
The blsp_dma controller is shared between the different subsystems, which is why it is already initialized by the firmware. We should not reinitialize it from Linux to avoid potential other users of the DMA engine to misbehave. In mainline this can be described using the "qcom,controlled-remotely" property. In the downstream/vendor kernel from Qualcomm there is an opposite "qcom,managed-locally" property. This property is *not* set for the qcom,sps-dma@7884000 and qcom,sps-dma@7ac4000 [1] so adding "qcom,controlled-remotely" upstream matches the behavior of the downstream/vendor kernel. Adding this fixes booting Longcheer L9360. [1]: https://git.codelinaro.org/clo/la/kernel/msm-3.10/-/blob/LA.BR.1.3.7.c26/arch/arm/boot/dts/qcom/msm8976.dtsi#L1149-1163 Fixes: 0484d3ce0902 ("arm64: dts: qcom: Add DTS for MSM8976 and MSM8956 SoCs") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: André Apitzsch <git@apitzsch.eu> Link: https://lore.kernel.org/r/20250615-bqx5plus-v2-1-72b45c84237d@apitzsch.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: sa8775p: Correct the interrupt for remoteprocLijuan Gao1-5/+5
Fix the incorrect IRQ numbers for ready and handover on sa8775p. The correct values are as follows: Fatal interrupt - 0 Ready interrupt - 1 Handover interrupt - 2 Stop acknowledge interrupt - 3 Fixes: df54dcb34ff2e ("arm64: dts: qcom: sa8775p: add ADSP, CDSP and GPDSP nodes") Signed-off-by: Lijuan Gao <lijuan.gao@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250612-correct_interrupt_for_remoteproc-v1-2-490ee6d92a1b@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: sm8550: Add support for camssWenmeng Liu1-0/+210
Add support for the camera subsystem on the SM8550 Qualcomm SoC. This includes bringing up the CSIPHY, CSID, VFE/RDI interfaces. SM8550 provides - 3 x VFE, 3 RDI per VFE - 2 x VFE Lite, 4 RDI per VFE - 3 x CSID - 2 x CSID Lite - 8 x CSI PHY Co-developed-by: Depeng Shao <quic_depengs@quicinc.com> Signed-off-by: Depeng Shao <quic_depengs@quicinc.com> Signed-off-by: Wenmeng Liu <quic_wenmliu@quicinc.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20250612-sm8550-camss-v2-1-ed370124075e@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: qcs615: disable the CTI device of the camera blockJie Gan1-0/+3
Disable the CTI device of the camera block to prevent potential NoC errors during AMBA bus device matching. The clocks for the Qualcomm Debug Subsystem (QDSS) are managed by aoss_qmp through a mailbox. However, the camera block resides outside the AP domain, meaning its QDSS clock cannot be controlled via aoss_qmp. Fixes: bf469630552a ("arm64: dts: qcom: qcs615: Add coresight nodes") Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250611030003.3801-1-jie.gan@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: qcs615-ride: enable remoteprocsLijuan Gao1-0/+12
Enable all remoteproc nodes on the qcs615-ride board and point to the appropriate firmware files to allow proper functioning of the remote processors. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> Link: https://lore.kernel.org/r/20250526-add_qcs615_remoteproc_support-v4-6-06a7d8bed0b5@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: qcs615: add ADSP and CDSP nodesLijuan Gao1-0/+86
Add nodes for remoteprocs: ADSP and CDSP for QCS615 SoC to enable proper remoteproc functionality. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> Link: https://lore.kernel.org/r/20250526-add_qcs615_remoteproc_support-v4-5-06a7d8bed0b5@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: qcs615: Add IMEM and PIL info regionLijuan Gao1-0/+14
Add a simple-mfd representing IMEM on QCS615 and define the PIL relocation info region as its child. The PIL region in IMEM is used to communicate load addresses of remoteproc to post mortem debug tools, so that these tools can collect ramdumps. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> Link: https://lore.kernel.org/r/20250526-add_qcs615_remoteproc_support-v4-4-06a7d8bed0b5@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: qcs615: Add mproc node for SEMP2PKyle Deng1-0/+44
The Shared Memory Point to Point (SMP2P) protocol facilitates communication of a single 32-bit value between two processors. Add these two nodes for remoteproc enablement on QCS615 SoC. Signed-off-by: Kyle Deng <quic_chunkaid@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> Link: https://lore.kernel.org/r/20250526-add_qcs615_remoteproc_support-v4-3-06a7d8bed0b5@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: Add support for X1-based Asus Zenbook A14Aleksandrs Vinarskis4-0/+1480
Initial support for Asus Zenbook A14. Particular moddel exists in X1-26-100, X1P-42-100 (UX3407QA) and X1E-78-100 (UX3407RA). Mostly similar to other X1-based laptops. Notable differences are: * Wifi/Bluetooth combo being Qualcomm FastConnect 6900 on UX3407QA and Qualcomm FastConnect 7800 on UX3407RA * USB Type-C retimers are Parade PS8833, appear to behave identical to Parade PS8830 * gpio90 is TZ protected Working: * Keyboard * Touchpad * NVME * Lid switch * Camera LED * eDP (FHD OLED, SDC420D) with brightness control * Bluetooth, WiFi (WCN6855) * USB Type-A port * USB Type-C ports in USB2/USB3/DP (both orientations) * aDSP/cDPS firmware loading, battery info * Sleep/suspend, nothing visibly broken on resume Out of scope of this series: * Audio (Speakers/microphones/headphone jack) * Camera (OmniVision OV02C10) * HDMI (Parade PS185HDM) * EC Add dtsi and create two configurations for UX3407QA, UX3407RA. Tested on UX3407QA with X1-26-100. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Link: https://lore.kernel.org/r/20250523131605.6624-2-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: sc7180: Expand IMEM regionKonrad Dybcio1-5/+5
We need more than what is currently described, expand the region to its actual boundaries. Fixes: ede638c42c82 ("arm64: dts: qcom: sc7180: Add IMEM and pil info regions") Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250523-topic-ipa_mem_dts-v1-3-f7aa94fac1ab@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: sdm845: Expand IMEM regionKonrad Dybcio1-5/+5
We need more than what is currently described, expand the region to its actual boundaries. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Fixes: 948f6161c6ab ("arm64: dts: qcom: sdm845: Add IMEM and PIL info region") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250523-topic-ipa_mem_dts-v1-2-f7aa94fac1ab@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: qcs615: fix a crash issue caused by infinite loop for ↵Jie Gan1-0/+1
Coresight An infinite loop has been created by the Coresight devices. When only a source device is enabled, the coresight_find_activated_sysfs_sink function is recursively invoked in an attempt to locate an active sink device, ultimately leading to a stack overflow and system crash. Therefore, disable the replicator1 to break the infinite loop and prevent a potential stack overflow. replicator1_out -> funnel_swao_in6 -> tmc_etf_swao_in -> tmc_etf_swao_out | | replicator1_in replicator_swao_in | | replicator0_out1 replicator_swao_out0 | | replicator0_in funnel_in1_in3 | | tmc_etf_out <- tmc_etf_in <- funnel_merg_out <- funnel_merg_in1 <- funnel_in1_out [call trace] dump_backtrace+0x9c/0x128 show_stack+0x20/0x38 dump_stack_lvl+0x48/0x60 dump_stack+0x18/0x28 panic+0x340/0x3b0 nmi_panic+0x94/0xa0 panic_bad_stack+0x114/0x138 handle_bad_stack+0x34/0xb8 __bad_stack+0x78/0x80 coresight_find_activated_sysfs_sink+0x28/0xa0 [coresight] coresight_find_activated_sysfs_sink+0x5c/0xa0 [coresight] coresight_find_activated_sysfs_sink+0x5c/0xa0 [coresight] coresight_find_activated_sysfs_sink+0x5c/0xa0 [coresight] coresight_find_activated_sysfs_sink+0x5c/0xa0 [coresight] ... coresight_find_activated_sysfs_sink+0x5c/0xa0 [coresight] coresight_enable_sysfs+0x80/0x2a0 [coresight] side effect after the change: Only trace data originating from AOSS can reach the ETF_SWAO and EUD sinks. Fixes: bf469630552a ("arm64: dts: qcom: qcs615: Add coresight nodes") Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20250522005016.2148-1-jie.gan@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: sm6350: add APR and some audio-related servicesLuca Weiss1-0/+59
Add the APR node and its associated services required for audio on the SM6350 SoC. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250321-sm6350-apr-v1-1-7805ce7b4dcf@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: qcm2290: Add CAMSS nodeLoic Poulain1-0/+103
Add node for the QCM2290 camera subsystem. Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250423072044.234024-7-loic.poulain@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: sa8775p-ride: enable videoVikash Garodia1-0/+6
Enable video nodes on the sa8775p-ride board and point to the appropriate firmware files. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> Link: https://lore.kernel.org/r/20250421-dtbinding-v5-3-363c1c05bc80@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: sa8775p: add support for video nodeVikash Garodia1-0/+71
Video node enables video on Qualcomm SA8775P platform. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> Link: https://lore.kernel.org/r/20250421-dtbinding-v5-2-363c1c05bc80@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: sa8775p: Add CPU OPP tables to scale DDR/L3Jagadeesh Kona1-0/+210
Add OPP tables required to scale DDR and L3 per freq-domain on SA8775P platform. If a single OPP table is used for both CPU domains, then _allocate_opp_table() won't be invoked for CPU4 but instead CPU4 will be added as device under the CPU0 OPP table. Due to this, dev_pm_opp_of_find_icc_paths() won't be invoked for CPU4 device and hence CPU4 won't be able to independently scale it's interconnects. Both CPU0 and CPU4 devices will scale the same ICC path which can lead to one device overwriting the BW vote placed by other device. Hence CPU0 and CPU4 require separate OPP tables to allow independent scaling of DDR and L3 frequencies for each CPU domain, with the final DDR and L3 frequencies being an aggregate of both. Co-developed-by: Shivnandan Kumar <quic_kshivnan@quicinc.com> Signed-off-by: Shivnandan Kumar <quic_kshivnan@quicinc.com> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250415095343.32125-8-quic_rlaggysh@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: sa8775p: add EPSS l3 interconnect providerRaviteja Laggyshetty1-0/+19
Add Epoch Subsystem (EPSS) L3 interconnect provider node on SA8775P SoCs. L3 instances on this SoC are same as SM8250 and SC7280 SoCs. These SoCs use EPSS_L3_PERF register instead of REG_L3_VOTE register for programming the perf level. This is taken care in the data associated with the target specific compatible. Since, the HW is same in the all SoCs with EPSS support, using the same generic compatible for all. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> Link: https://lore.kernel.org/r/20250415095343.32125-7-quic_rlaggysh@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: sm8750: Add UFS nodes for SM8750 QRD boardNitin Rawat1-0/+18
Add UFS host controller and PHY nodes for SM8750 QRD board. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Co-developed-by: Manish Pandey <quic_mapa@quicinc.com> Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250327-sm8750_ufs_master-v3-4-bad1f5398d0a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: sm8750: Add UFS nodes for SM8750 MTPNitin Rawat1-0/+18
Add UFS host controller and PHY nodes for SM8750 MTP board. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Co-developed-by: Manish Pandey <quic_mapa@quicinc.com> Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250327-sm8750_ufs_master-v3-3-bad1f5398d0a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: sm8750: Add UFS nodes for SM8750 SoCNitin Rawat1-0/+103
Add UFS host controller and PHY nodes for SM8750 SoC. Co-developed-by: Manish Pandey <quic_mapa@quicinc.com> Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250327-sm8750_ufs_master-v3-2-bad1f5398d0a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: apq8016-sbc-d3-camera: Convert to DT overlayStephan Gerhold2-4/+13
Follow the example of the recently added apq8016-sbc-usb-host.dtso and convert apq8016-sbc-d3-camera-mezzanine.dts to a DT overlay that can be applied on top of the apq8016-sbc.dtb. This makes it more clear that this is not a special type of DB410c but just an addon board that can be added on top. Functionally there should not be any difference since apq8016-sbc-d3-camera-mezzanine.dtb is still generated as before (but now by applying the overlay on top of apq8016-sbc.dtb). Since dtc does not know that there are default #address/size-cells in msm8916.dtsi, repeat those in the overlay to avoid dtc warnings because it expects the wrong amount of address/size-cells. It would be nice to have a generic overlay for the D3 camera mezzanine (that can be applied to all 96Boards) but that's much more complicated than providing a board-specific DT overlay as intermediate step. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250408-apq8016-sbc-camera-dtso-v1-1-cdf1cd41bda6@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-18arm64: dts: qcom: x1e80100-dell-xps-9345: Add WiFi/BT pwrseqAleksandrs Vinarskis1-0/+144
Add the WiFi/BT nodes for XPS and describe the regulators for the WCN7850 combo chip using the new power sequencing bindings. All voltages are derived from chained fixed regulators controlled using a single GPIO. Based on the commit d09ab685a8f5 ("arm64: dts: qcom: x1e80100-qcp: Add WiFi/BT pwrseq"). Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Tested-by: Laurentiu Tudor <laurentiu.tudor1@dell.com> Link: https://lore.kernel.org/r/20250331204610.526672-2-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-17arm64: dts: qcom: Add QMP handle for qcom_statsMaulik Shah4-0/+4
Add QMP handle which is used to send QMP command to always on processor to populate DDR stats. Add QMP handle for SM8450/SM8550/SM8650/SM8750. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250611-ddr_stats_-v5-3-24b16dd67c9c@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-17arm64: dts: qcom: qrb5165-rb5-vision-mezzanine: remove camcc status propertyVladimir Zapolskiy1-4/+0
After a change enabling camera clock controller for all Qualcomm SM8250 boards the explicit control of the clock controller status can be removed from the RB5 vision mezzanine dts overlay file. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250523092313.2625421-2-vladimir.zapolskiy@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-17arm64: dts: qcom: sm8250: enable camcc clock controller by defaultVladimir Zapolskiy1-1/+0
Enable camera clock controller on all Qualcomm SM8250 derived boards by default due to the established agreement of having all clock controllers enabled. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250523092313.2625421-1-vladimir.zapolskiy@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11arm64: dts: qcom: x1p42100: Fix thermal sensor configurationKonrad Dybcio2-1/+557
The 8-core SKUs of the X1 family have a different sensor configuration. Override it to expose what the sensors really measure. Fixes: f08edb529916 ("arm64: dts: qcom: Add X1P42100 SoC and CRD") Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250520-topic-x1p4_tsens-v2-1-9687b789a4fb@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11arm64: dts: qcom: sm8650: remove unused regPengyu Luo1-2/+1
<0 0x17a30000 0 0x10000> is unused for apps_rsc. Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250525152317.1378105-1-mitltlatltl@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11arm64: dts: qcom: sm8750-qrd: Add sound (speakers, headset codec, dmics)Krzysztof Kozlowski1-0/+225
Add device nodes for most of the sound support - WSA884x smart speakers, WCD9395 audio codec (headset) and sound card - which allows sound playback via speakers and recording via AMIC microphones. Changes bring necessary foundation for headset playback/recording via USB, but that part is not yet ready. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250526-sm8750-audio-part-2-v3-3-74429c686bb1@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11arm64: dts: qcom: sm8750-mtp: Add sound (speakers, headset codec, dmics)Krzysztof Kozlowski1-0/+215
Add device nodes for most of the sound support - WSA883x smart speakers, WCD9395 audio codec (headset) and sound card - which allows sound playback via speakers and recording via DMIC microphones. Changes bring necessary foundation for headset playback/recording via USB, but that part is not yet ready. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250526-sm8750-audio-part-2-v3-2-74429c686bb1@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11arm64: dts: qcom: sm8750: Add Soundwire nodesKrzysztof Kozlowski1-0/+122
Add Soundwire controllers on SM8750, fully compatible with earlier SM8650 generation. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250526-sm8750-audio-part-2-v3-1-74429c686bb1@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11arm64: dts: qcom: x1e80100-hp-x14: amend order of nodesJens Glathe1-11/+11
amend the order of pmk8550_* nodes afte pmc8380_* Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250610-hp-x14-v3-3-35d5b50efae0@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11arm64: dts: qcom: x1e80100-hp-x14: remove unused i2c busesJens Glathe1-25/+0
At least from Linux, these buses are not in use. Remove them from the dt. Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250610-hp-x14-v3-2-35d5b50efae0@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11arm64: dts: qcom: x1e80100-hp-x14: add usb-1-ss1-sbu-muxJens Glathe1-0/+51
The usb_1_1 port doesn't have the PS8830 repeater, but apparently some MUX for DP altmode control. After a suggestion from sgerhold on '#aarch64-laptops' I added gpio-sbu-mux nodes from the x1e80100-QCP tree, and this appears to work well. It is still guesswork, but working guesswork. Added and rewired for usb_1_1 Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Link: https://lore.kernel.org/r/20250610-hp-x14-v3-1-35d5b50efae0@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11arm64: dts: qcom: Add camera clock controller for sc8180xSatya Priya Kakitapalli1-0/+14
Add device node for camera clock controller on Qualcomm SC8180X platform. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Link: https://lore.kernel.org/r/20250512-sc8180x-camcc-support-v4-4-8fb1d3265f52@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10arm64: dts: qcom: sm6350: Add video clock controllerLuca Weiss1-0/+14
Add a node for the videocc found on the SM6350 SoC. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250324-sm6350-videocc-v2-4-cc22386433f4@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10arm64: dts: qcom: qcs8300-ride: enable videoVikash Garodia1-0/+4
Enable video nodes on the qcs8300-ride board. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> Link: https://lore.kernel.org/r/20250501-qcs8300_iris-v7-5-b229d5347990@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10arm64: dts: qcom: qcs8300: add video nodeVikash Garodia1-0/+71
Add the IRIS video-codec node on QCS8300 platform to support video functionality. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250501-qcs8300_iris-v7-4-b229d5347990@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10arm64: dts: qcom: sa8775p-ride: add anx7625 DSI to DP bridge nodesAyushi Makhija1-0/+232
Add anx7625 DSI to DP bridge device nodes. Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250604071851.1438612-3-quic_amakhija@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10arm64: dts: qcom: sa8775p: add Display Serial Interface device nodesAyushi Makhija1-1/+176
Add device tree nodes for the DSI0 and DSI1 controllers with their corresponding PHYs found on Qualcomm SA8775P SoC. Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com> Reviewed-by: Dmitry Baryshkov <lumag@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250604071851.1438612-2-quic_amakhija@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-10arm64: dts: qcom: x1e80100: Add missing 'global' PCIe interruptManivannan Sadhasivam1-6/+12
'global' interrupt is used to receive PCIe controller and link specific events. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20250227-pcie-global-irq-v1-23-2b70a7819d1e@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-01 21:59:57 +0300