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path: root/arch/arm/mach-tegra/headsmp.S
AgeCommit message (Expand)AuthorFilesLines
2015-06-01ARM: v7 setup function should invalidate L1 cacheRussell King1-12/+0
2013-07-19ARM: tegra: do v7_invalidate_l1 only when CPU is Cortex-A9Joseph Lo1-1/+2
2013-03-12ARM: tegra: don't unlock MMIO access to DBGLARJoseph Lo1-3/+0
2013-02-12Merge branch 'socfpga/hw' into next/socOlof Johansson1-43/+0
2013-02-12arm: Add v7_invalidate_l1 to cache-v7.SDinh Nguyen1-43/+0
2013-01-28ARM: tegra: make device can run on UPJoseph Lo1-220/+1
2013-01-28ARM: tegra: clean up the CPUINIT sectionJoseph Lo1-2/+0
2012-11-16ARM: tegra: retain L2 content over CPU suspend/resumeJoseph Lo1-0/+11
2012-11-16ARM: tegra: cpuidle: add CPU resume functionJoseph Lo1-0/+60
2012-11-05ARM: tegra: move iomap.h to mach-tegraStephen Warren1-2/+1
2012-09-13ARM: tegra: clean up the common assembly macros into sleep.hJoseph Lo1-5/+1
2012-02-27ARM: tegra: support for secondary cores on Tegra30Peter De Schrijver1-0/+32
2012-02-27ARM: tegra: rework Tegra secondary CPU core bringupPeter De Schrijver1-8/+127
2010-08-06[ARM] tegra: SMP supportColin Cross1-0/+61