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2022-11-07ARM: dts: qcom: mdm9615: remove useless amba subnodeNeil Armstrong1-42/+36
The separate amba device node doesn't add anything significant to the DT. The OF parsing code already creates amba_device or platform_device depending on the compatibility lists. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220928-mdm9615-dt-schema-fixes-v4-11-dac2dfaac703@linaro.org
2022-11-07ARM: dts: qcom: mdm9615: remove invalid interrupt-names from pl18x mmc nodesNeil Armstrong1-2/+0
This solves the 'interrupt-names' was unexpected dtbs check error. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220928-mdm9615-dt-schema-fixes-v4-10-dac2dfaac703@linaro.org
2022-11-07ARM: dts: qcom: mdm9615: remove invalid spi-max-frequency gsbi3_spi nodeNeil Armstrong1-1/+0
The spi-max-frequency property has nothing to do in the controller's node, remove it and fix the 'spi-max-frequency' was unexpected dtbs check error. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220928-mdm9615-dt-schema-fixes-v4-4-dac2dfaac703@linaro.org
2022-11-07ARM: dts: qcom: mdm9615: add missing reg in cpu@0 nodeNeil Armstrong1-0/+1
Fixes cpu@0: 'reg' is a required property from dtbs check. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220928-mdm9615-dt-schema-fixes-v4-3-dac2dfaac703@linaro.org
2022-11-07ARM: dts: qcom: mdm9615*: add SPDX-License-IdentifierNeil Armstrong3-114/+3
Replace the license blob by a clean SPDX-License-Identifier with GPL2+ or MIT even if X11 is specified in the original blob since the actual license text corresponds to a MIT license. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220928-mdm9615-dt-schema-fixes-v4-2-dac2dfaac703@linaro.org
2022-11-06ARM: dts: qcom: ipq8064-rb3011: Add SoC compatibleKrzysztof Kozlowski1-1/+1
Add qcom,ipq8064 compatible fallback for the SoC. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221017014653.12970-2-krzysztof.kozlowski@linaro.org
2022-11-06ARM: dts: qcom: msm8974: align TLMM pin configuration with DT schemaKrzysztof Kozlowski6-96/+98
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. All nodes for GPIOs must also define the function property. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221017012225.8579-2-krzysztof.kozlowski@linaro.org
2022-11-06ARM: dts: qcom: ipq4018-jalapeno: Add SoC compatibleKrzysztof Kozlowski1-1/+1
Add qcom,ipq4018 compatible fallback for the SoC. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221013155418.47577-4-krzysztof.kozlowski@linaro.org
2022-11-06ARM: dts: qcom: ipq4018-ap120c-ac: Add SoC compatibleKrzysztof Kozlowski1-1/+1
Add qcom,ipq4018 compatible fallback for the SoC. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221013155418.47577-3-krzysztof.kozlowski@linaro.org
2022-11-06ARM: dts: qcom: msm8974: Add CCI busLuca Weiss1-0/+66
Add a node for the Camera Control Interface I2C bus found on MSM8974. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221002122859.75525-7-matti.lehtimaki@gmail.com
2022-11-06ARM: dts: qcom: msm8226: Add CCI busRayyan Ansari1-0/+44
Add a node for the Camera Control Interface I2C bus found on MSM8226. Signed-off-by: Rayyan Ansari <rayyan@ansari.sh> Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221002122859.75525-6-matti.lehtimaki@gmail.com
2022-11-06ARM: dts: qcom-ipq8064: use pll4 clock for the gcc deviceDmitry Baryshkov1-2/+2
Add a link to LCC's PLL4 clock to the GCC device node following the bindings (and driver needs). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220927113826.246241-4-dmitry.baryshkov@linaro.org
2022-11-06ARM: dts: qcom: Add support for Huawei WatchLuca Weiss2-0/+377
Add support for this smartwatch, based on Snapdragon 400 SoC. Currently supported functionality: * Internal storage * USB * Charger * Power button * Bluetooth * Wifi Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220924152937.4076-2-luca@z3ntu.xyz
2022-11-06ARM: dts: qcom-apq8064: change HDMI PHY node name to generic oneDmitry Baryshkov1-1/+1
Change HDMI PHY node names from custom 'hdmi-phy' to the generic 'phy'. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220924094347.178666-2-dmitry.baryshkov@linaro.org
2022-11-01ARM: dts: ux500: Add trips to battery thermal zonesLinus Walleij9-0/+72
Recent changes to the thermal framework has made the trip points (trips) for thermal zones compulsory, which made the Ux500 DTS files break validation and also stopped probing because of similar changes to the code. Fix this by adding an "outer bounding box": battery thermal zones should not get warmer than 70 degress, then we will shut down. Fixes: 8c596324232d ("dt-bindings: thermal: Fix missing required property") Fixes: 3fd6d6e2b4e8 ("thermal/of: Rework the thermal device tree initialization") Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-pm@vger.kernel.org Link: https://lore.kernel.org/r/20221030210854.346662-1-linus.walleij@linaro.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-01ARM: dts: at91: sam9x60ek: remove status = "okay" for regulatorsClaudiu Beznea1-4/+0
Remove status = "okay" for sam9x60ek regulator as okay is the default status. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-12-claudiu.beznea@microchip.com
2022-11-01ARM: dts: at91: sama7g5: use generic name for securamClaudiu Beznea1-1/+1
Use generic sram name for securam. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-11-claudiu.beznea@microchip.com
2022-11-01ARM: dts: at91: sama7g5: add thermal zones nodeClaudiu Beznea1-0/+42
Add thermal zones node with its associated trips and cooling-maps. It uses CPUFreq as cooling device for temperatures in the interval [90, 100) degrees Celsius and describe the temperature of 100 degrees Celsius as critical temperature. System will be is shutting down when reaching critical temperature. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-7-claudiu.beznea@microchip.com
2022-11-01ARM: dts: at91: sama7g5: add temperature sensorClaudiu Beznea1-0/+8
Add temperature sensor node. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-6-claudiu.beznea@microchip.com
2022-11-01ARM: dts: at91: sama7g5: add cells for temperature calibrationClaudiu Beznea1-0/+2
Add NVMEM cell to ADC for temperature calibration data. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-5-claudiu.beznea@microchip.com
2022-11-01ARM: dts: at91: sama7g5: add io-channel-cells to adc nodeClaudiu Beznea1-0/+1
Add io-channel-cell to ADC node. It is necessary for DT users of ADC. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-4-claudiu.beznea@microchip.com
2022-11-01ARM: dts: at91: sama7g5: add otpc nodeClaudiu Beznea1-0/+12
Add OTPC node along with temperature calibration cell. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-3-claudiu.beznea@microchip.com
2022-10-31ARM: dts: lan966x: Enable sgpio on pcb8291Horatiu Vultur1-0/+20
Enable sgpio node on pcb8291 as this is needed to be able to control the LEDs on this board. Otherwise the LEDs support on the board will not be available. On the other board pcb8309 the sgpio is already enabled because it needed to access the SFP ports. Fixes: 0b7baa1a307f ("ARM: dts: lan966x: add led configuration") Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026174303.702919-1-horatiu.vultur@microchip.com
2022-10-31ARM: dts: imx7d-remarkable2: Enable silergy,sy7636aAlistair Francis1-0/+62
Enable the silergy,sy7636a and silergy,sy7636a-regulator on the reMarkable2. Signed-off-by: Alistair Francis <alistair@alistair23.me> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-10-30ARM: dts: rockchip: rk3188: fix lcdc1-rgb24 node nameJohan Jonker1-1/+1
The lcdc1-rgb24 node name is out of line with the rest of the rk3188 lcdc1 node, so fix it. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/7b9c0a6f-626b-07e8-ae74-7e0f08b8d241@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-30ARM: dts: rockchip: fix ir-receiver node namesJohan Jonker1-1/+1
Fix ir-receiver node names on Rockchip boards, so that they match with regex: '^ir(-receiver)?(@[a-f0-9]+)?$' Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/ea5af279-f44c-afea-023d-bb37f5a0d58d@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-30ARM: dts: rockchip: fix adc-keys sub node namesJohan Jonker2-4/+4
Fix adc-keys sub node names on Rockchip boards, so that they match with regex: '^button-' Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/7a0013b1-3a55-a344-e9ea-eacb4b49433c@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-30arm: dts: rockchip: remove clock-frequency from rtcSebastian Reichel5-5/+0
'clock-frequency' is not part of the DT binding and not supported by the Linux driver. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20221024165549.74574-5-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-30arm: dts: rockchip: fix node name for hym8563 rtcSebastian Reichel5-5/+5
Fix the node name for hym8563 in all arm rockchip devicetrees. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20221024165549.74574-4-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-29ARM: dts: imx6dl-yapp4: Do not allow PM to switch PU regulator off on Q/QPPetr Benes2-0/+8
Fix our design flaw in supply voltage distribution on the Quad and QuadPlus based boards. The problem is that we supply the SoC cache (VDD_CACHE_CAP) from VDD_PU instead of VDD_SOC. The VDD_PU internal regulator can be disabled by PM if VPU or GPU is not used. If that happens the system freezes. To prevent that configure the reg_pu regulator to be always on. Fixes: 0de4ab81ab26 ("ARM: dts: imx6dl-yapp4: Add Y Soft IOTA Crux/Crux+ board") Cc: petrben@gmail.com Cc: stable@vger.kernel.org Signed-off-by: Petr Benes <petr.benes@ysoft.com> Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-10-29ARM: dts: imx6qdl-gw59{10,13}: fix user pushbutton GPIO offsetTim Harvey2-2/+2
The GW5910 and GW5913 have a user pushbutton that is tied to the Gateworks System Controller GPIO offset 2. Fix the invalid offset of 0. Fixes: 64bf0a0af18d ("ARM: dts: imx6qdl-gw: add Gateworks System Controller support") Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-10-29ARM: dts: imx6sl-tolino-shine2hd: Add backlight boostAndreas Kemnade1-1/+8
Vendor system has a separate checkbox for increasing brightness of the backlight combined with a big warning that power consumption will greatly increase. With that checkbox enabled there is a greater range in which backlight brightness can be adjusted Add a switch to achieve the same, since the backlight is actually LED, this seems to be the most appopiate place to add it. Nothing fits perfectly. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-10-29ARM: dts: imx6sl-tolino-shine2hd: Add backlightAndreas Kemnade1-0/+21
Add backlight for Tolino Shine2 HD. It uses the PWM of the embedded controller. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-10-29ARM: dts: colibri-imx7: fix confusing namingPhilippe Schenker1-2/+2
fix the naming of node-name vs label-name to the correct one, that is the label was always correct. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-10-29ARM: dts: colibri-imx6ull: add -hog to gpio hogsPhilippe Schenker3-10/+10
Since it seems to be a naming-convention to add -hog for gpio hogs do this. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-10-29ARM: dts: colibri-imx6ull: enable default peripheralsPhilippe Schenker8-1/+233
For NAND modules Toradex does not provide any device-tree overlays. But we always had a default display output enabled on NAND modules as well as touchscreens that are placed on displays which can easily be plugged into those carrier boards. Do reenable these displays and touchscreen output on all device-trees that are used on NAND modules. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-10-29ARM: dts: colibri-imx6ull: keep peripherals disabledPhilippe Schenker1-3/+5
Toradex does provide device-tree overlays to enable certain evaluation hardware. Keep the buses disabled by default to be enabled again with overlays. For customers including this device-tree this has also the advantage that the hardware we want by default running does not automatically enable signals on their end. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-10-28ARM: dts: renesas: Miscellaneous whitespace fixesGeert Uytterhoeven5-9/+9
Remove superfluous spaces near properties and equal signs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1666adade07e16b77af1f03c55799b2ad1378e60.1666605877.git.geert+renesas@glider.be
2022-10-26ARM: dts: axp22x/axp809: Add GPIO controller nodesSamuel Holland2-0/+13
These PMICs all contain a GPIO controller. Now that the binding for this variant is documented, wire up the controller in the device tree. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220916042751.47906-3-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-26ARM: dts: axp803/axp81x: Drop GPIO LDO pinctrl nodesSamuel Holland1-14/+0
The "ldo-io0" and "ldo-io1" regulators are enabled/disabled by toggling the pinmux between two functions. This happens in the regulator driver. Setting the pinmux to "ldo" in the DT is inappropriate because it would enable the regulator before the driver has a chance to set the correct initial voltage. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220916042751.47906-2-samuel@sholland.org Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-26ARM: dts: sunxi: correct indentationKrzysztof Kozlowski1-7/+7
Do not use spaces for indentation. Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20221002091959.68815-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-26ARM: dts: omap: correct indentationKrzysztof Kozlowski9-101/+101
Do not use spaces for indentation. Link: https://lore.kernel.org/r/20221002092002.68880-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-26ARM: dts: kirkwood: correct indentationKrzysztof Kozlowski29-113/+113
Do not use spaces for indentation. Link: https://lore.kernel.org/r/20221002092007.68955-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-26ARM: dts: armada: correct indentationKrzysztof Kozlowski5-26/+26
Do not use spaces for indentation. Link: https://lore.kernel.org/r/20221002092008.69003-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-26ARM: dts: ti: correct indentationKrzysztof Kozlowski4-20/+20
Do not use spaces for indentation. Link: https://lore.kernel.org/r/20221002092010.69030-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-24ARM: dts: socfpga: arria10: Increase NAND boot partition sizeTeoh Ji Sheng1-2/+2
Content in NAND boot partition have exceeded 32MB defined in device tree node. Increase boot partition size to 37MB to support larger kernel Image and FPGA bitstream. Signed-off-by: Teoh Ji Sheng <ji.sheng.teoh@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-10-24ARM: dts: lan966x: Add interrupt support for PHYs on pcb8290Horatiu Vultur1-0/+16
Add interrupt support for the PHYs found on pcb8290. They are all sharing the same interrupt line towards lan966x. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220915064112.1935051-1-horatiu.vultur@microchip.com
2022-10-24ARM: dts: at91: sama7g5: fix signal name of pin PB2Mihai Sain1-1/+1
The signal name of pin PB2 with function F is FLEXCOM11_IO1 as it is defined in the datasheet. Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221017083119.1643-1-mihai.sain@microchip.com
2022-10-24ARM: dts: imx6qdl-sabre*: fix Egalax touchscreen propertiesDmitry Torokhov2-6/+6
This patch fixes interrupt trigger (should be level low as that is what the driver is always using), the GPIO that is the interrupt source that is also used to wake up chip by driving the line low. The proper polarity is be needed for converting the driver to gpiod API. Acked-by: Shawn Guo <shawnguo@kernel.org> Link: https://lore.kernel.org/r/20220920042608.1865560-1-dmitry.torokhov@gmail.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2022-10-24ARM: dts: stm32: enable USB OTG in dual role mode on stm32mp135f-dkFabrice Gasnier1-0/+34
The USB OTG controller provides the USB data available on stm32mp135f-dk, on the Type-C connector. Data role is determined by "usb-role-switch". A STM32G0 provides the USB Type-C and Power Delivery connectivity. It controls dual role power and dual role data through UCSI protocol over I2C. It's wired on I2C1, with an interrupt pin on PI2 GPIO. Its firmware maybe updated over I2C, so use the optional firmware-name to enable firmware update. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-26 18:01:19 +0300