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2017-07-27ARM: dts: r8a7791: Add Inter Connect RAMGeert Uytterhoeven1-0/+10
R-Car M2-W has 2 regions of Inter Connect RAM (72 + 4 KiB). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: dts: r8a7790: Add Inter Connect RAMGeert Uytterhoeven1-0/+10
R-Car H2 has 2 regions of Inter Connect RAM (72 + 4 KiB). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: dts: r8a7745: Add Inter Connect RAMGeert Uytterhoeven1-0/+15
RZ/G1E has 3 regions of Inter Connect RAM (72 + 4 + 256 KiB). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: dts: r8a7743: Add Inter Connect RAMGeert Uytterhoeven1-0/+15
RZ/G1M has 3 regions of Inter Connect RAM (72 + 4 + 256 KiB). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: dts: iwg20d-q7: Add Ethernet AVB supportBiju Das1-0/+21
Define the iWave RainboW-G20D-Qseven board dependent part of the Ethernet AVB device node. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: dts: r8a7743: Add Ethernet AVB supportBiju Das1-0/+13
Add Ethernet AVB support for r8a7743 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: dts: iwg20d-q7: Add pinctl support for scif0Biju Das1-0/+10
Adding pinctrl support for scif0 interface. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: dts: r8a7743: Add GPIO supportBiju Das1-0/+120
Describe GPIO blocks in the R8A7743 device tree. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: dts: sk-rzg1m: add Ether pinsSergei Shtylyov1-0/+13
Add the (previously omitted) Ether/PHY pin data to the SK-RZG1M board's device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: dts: sk-rzg1m: add SCIF0 pinsSergei Shtylyov1-1/+11
Add the (previously omitted) SCIF0 pin data to the SK-RZG1M board's device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: dts: r8a7743: add PFC supportSergei Shtylyov1-1/+6
Define the generic R8A7743 part of the PFC device node. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: dts: koelsch: Add generic compatible string for I2C EEPROMJavier Martinez Canillas1-1/+1
The at24 driver allows to register I2C EEPROM chips using different vendor and devices, but the I2C subsystem does not take the vendor into account when matching using the I2C table since it only has device entries. But when matching using an OF table, both the vendor and device has to be taken into account so the driver defines only a set of compatible strings using the "atmel" vendor as a generic fallback for compatible I2C devices. So add this generic fallback to the device node compatible string to make the device to match the driver using the OF device ID table. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: dts: r7s72100: Add generic compatible string for I2C EEPROMJavier Martinez Canillas1-1/+1
The at24 driver allows to register I2C EEPROM chips using different vendor and devices, but the I2C subsystem does not take the vendor into account when matching using the I2C table since it only has device entries. But when matching using an OF table, both the vendor and device has to be taken into account so the driver defines only a set of compatible strings using the "atmel" vendor as a generic fallback for compatible I2C devices. So add this generic fallback to the device node compatible string to make the device to match the driver using the OF device ID table. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27ARM: dts: sun8i: a83t: Switch to CCU device tree binding macrosChen-Yu Tsai1-7/+9
Now that the CCU device tree binding headers have been merged, we can use the properly named macros in the device tree, instead of raw numbers. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-07-27ARM: dts: sunxi: h3/h5: Correct emac register sizeCorentin Labbe1-1/+1
The datasheet said that emac register size is 0x10000 not 0x104 Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> [wens@csie.org: Fixed commit subject prefix] Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-07-27ARM: dts: da850-lcdk: drop unused VPIF endpointsKevin Hilman1-7/+0
Drop the unused endpoints. They should only be used when there is an actual remote-endpoint connected. Cc: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-07-27ARM: dts: da850-evm: drop unused VPIF endpointsKevin Hilman1-21/+0
Drop the unused endpoints. They should only be used when there is an actual remote-endpoint connected. Signed-off-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-07-27Merge tag 'mvebu-fixes-4.13-1' of git://git.infradead.org/linux-mvebu into fixesArnd Bergmann1-2/+2
Pull "mvebu fixes for 4.13 (part 1)" from Gregory CLEMENT: - Fix wrong irq type for gpio expeander on Armada 388 GP - Use __pa_symbol instead of virt_to_phys in the mv98dx3236 platform SMP code * tag 'mvebu-fixes-4.13-1' of git://git.infradead.org/linux-mvebu: ARM: dts: armada-38x: Fix irq type for pca955 ARM: mvebu: use __pa_symbol in the mv98dx3236 platform SMP code
2017-07-27ARM: dts: exynos: Add clocks to audss block to fix silent hang on Exynos4412Krzysztof Kozlowski1-0/+3
Add necessary parent clocks for audss (Audio SubSystem, MAUDIO) clock controller block. This allows driver to keep EPLL enabled before accessing any MAUDIO registers thus fixing silent hang. This silent hang appeared with commit 6edfa11cb396 ("clk: samsung: Add enable/disable operation for PLL36XX clocks"), e.g. on Odroid U3 usually with last (but unrelated) messages: [ 2.382741] input: gpio_keys as /devices/platform/gpio_keys/input/input0 [ 2.405686] usb 1-3: new high-speed USB device number 3 using exynos-ehci [ 2.419843] max77686-rtc max77686-rtc: setting system clock to 2017-06-21 17:04:13 UTC (1498064653) Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-07-27Merge tag 'omap-for-v4.13/fixes-merge-window' of ↵Arnd Bergmann3-4/+36
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Pull "Few fixes for omaps for issues found recently" from Tony Lindgren: - Fix disable_irq related shared IRQ warnings for omap3 PRM - Fix omap4 legacy code regression that accidentally removed code that we still need for PRM interrupts - Fix dm8168-evm NAND pins and MMC write protect pin direction - Fix dra71-evm mdio impedance values * tag 'omap-for-v4.13/fixes-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: dra71-evm: mdio: Fix impedance values ARM: dts: dm816x: Correct the state of the write protect pin ARM: dts: dm816x: Correct NAND support nodes ARM: OMAP4: Fix legacy code clean-up regression ARM: OMAP2+: Fix omap3 prm shared irq
2017-07-27ARM: dts: stm32: enable ADC on stm32h743i-eval boardFabrice Gasnier1-0/+18
There's a potentiometer connected to ADC1 and ADC2 in0 on stm32h743i-eval board. - Add fixed-voltage 'vdda' regulator that supplies 'vref' pin. It's used as voltage reference for ADC and/or DAC. - Enable ADC1 in0 input (arbitrary choice: could be ADC2 as well). Note: No pinctrl is needed to use in0 dedicated analog input pin (e.g. ADC12_INP0). Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-07-27ARM: dts: stm32: add ADC support on stm32h743Fabrice Gasnier1-0/+53
Add support for ADC (Analog to Digital Converter) to STM32H743. It has 3 ADCs, distributed over two ADC blocks: - ADC1 and ADC2 @0x40022000 - ADC3 @0x58026000 (instantiated separately) Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-07-27ARM: dts: stm32: Add DAC support on stm32h743Fabrice Gasnier1-0/+24
Add support for DAC (Digital to Analog Converter) to STM32H743. STM32H743 DAC has two output channels. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-07-27ARM: dts: stm32: Add DAC support on stm32f429Fabrice Gasnier1-0/+25
Add support for DAC (Digital to Analog Converter) to STM32F429. STM32F429 DAC has two output channels. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Acked-by: Joanthan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-07-26ARM: dts: stm32: enable CEC for stm32f769 discoveryBenjamin Gaignard1-0/+6
enable cec for stm32f769 discovery board Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-07-26ARM: dts: stm32: add CEC for stm32f7 familyBenjamin Gaignard1-0/+18
add cec in devicetree for stm32f7 family Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-07-26ARM: dts: stm32: reorder stm32h743 nodesAlexandre Torgue1-10/+10
Reorder nodes to keep coherency with others platforms (stm32f4/stm32f7). Nodes are ordered following base address. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2017-07-26ARM: dts: stm32: Remove rdinit from bootargs on stm32f429-discoAlexandre TORGUE1-1/+1
The rootfs is independent from the board. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-07-26ARM: dts: stm32: Remove rdinit from bootargs on stm32f429i-evalAlexandre TORGUE1-1/+1
The rootfs is independent from the board. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-07-26ARM: dts: stm32: Remove rdinit from bootargs on stm32f469-discoAlexandre TORGUE1-1/+1
The rootfs is independent from the board. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-07-26ARM: dts: at91: sama5d2_xplained: add pin muxing and enable classdCyrille Pitchen1-0/+16
This patch adds the pin muxing for classd and enables it. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-07-26ARM: dts: at91: sama5d2: add classd nodesCyrille Pitchen1-1/+38
This patch adds nodes for the classd device and its generated clock. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-07-26ARM: dts: imx6qdl-nitrogen6x: fix USB PHY resetGary Bisson1-0/+19
Declared as a regulator since the driver doesn't have a reset-gpios property for this. This ensures that the PHY is woken up, not depending on the state the second stage bootloader leaves the pin. This is a workaround until a proper mechanism is provided to reset such devices like the pwrseq library [1] for instance. [1] https://lkml.org/lkml/2017/2/10/779 Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-07-26ARM: dts: imx6qdl-sabrelite: fix USB PHY resetGary Bisson1-0/+19
Declared as a regulator since the driver doesn't have a reset-gpios property for this. This ensures that the PHY is woken up, not depending on the state the second stage bootloader leaves the pin. This is a workaround until a proper mechanism is provided to reset such devices like the pwrseq library [1] for instance. [1] https://lkml.org/lkml/2017/2/10/779 Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-07-25ARM: dts: imx6: RIoTboard provide gpio-line-namesOleksij Rempel1-0/+45
gpio-line-names may help to make work with GPIOs from user space easier. Following examples are provided with libgpiod https://github.com/brgl/libgpiod : |# Toggle a GPIO by name, then wait for the user to press ENTER. |$ gpioset --mode=wait `gpiofind "USR-LED-2"`=1 |# Pause execution until a single event of any type occurs. Don't print |# anything. Find the line by name. |$ gpiomon --num-events=1 --silent `gpiofind "USR-IN"` Used names was taken from RIoTboard schematics, version 1 (2013.12.07). Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-07-25ARM: dts: imx6: RDU2: Add Micrel PHY interruptAndrew Lunn1-0/+4
The Micrel PHY has its interrupt pin connected to a GPIO line. Wire this up in the device tree. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-07-25ARM: dts: imx6: RDU2: Add Switch interruptsAndrew Lunn1-1/+52
The Marvell switch has its interrupt pin connected to a GPIO line. Wire this up in the device tree. This then allows us to use interrupts from the embedded Ethernet PHYs in the switch. Also wire them up in device tree. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-07-25ARM: dts: imx6: RDU2: Add Switch EEPROMAndrew Lunn1-0/+1
The Marvell switch has an EEPROM connected to it. List the size in DT, in order to enable access to it via ethtool. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-07-25ARM: dts: imx6: RDU2: Add DSA support for the Marvell 88E6352Andrew Lunn1-0/+50
The RDU2 has a Marvell 88E6352 switch. Both the FEC and the i210 Ethernet interfaces are connected to the switch. Make the FEC the DSA "CPU" port, and the i210 as a regular port on the switch. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-07-25ARM: dts: imx6: RDU2: Add Micrel PHY to FECAndrew Lunn1-5/+5
The FEC has a Micrel PHY connected to it. This PHY is managed using the bit-banging MDIO bus. Add this to the device tree. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-07-25ARM: dts: imx7d-sdb: Pass 'enable-gpios' and 'power-supply' propertiesMarco Franchi1-8/+13
Currently the LCD is turned on thanks to the bootloader initialization. In order to make the kernel to turn on the LCD on is own, pass the 'enable-gpios' and 'power-supply' properties. Also, the GPIO1_IO01 is not used as PWM functionality on this board. It is connected to the PWREN pin of connector J14 and has a GPIO function, so remove the PWM1 node and change the GPIO1_IO01 IOMUX to GPIO function. Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-07-25ARM: dts: imx7d-sdb: Add DRM panel supportMarco Franchi1-23/+13
It is preferred to use the panel compatible string rather than passing the LCD timming in the device tree. So pass the "innolux,at043tn24" compatible string to describe the parallel LCD on this board. Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-07-25ARM: dts: imx6qdl-gw5xxx: Remove the 'uart-has-rtscts' propertyFabio Estevam3-3/+0
The 'uart-has-rtscts' property should be used when the board exposes the native RTS and CTS UART pins. On the imx6qdl-gw5xxx boards such pins are not used, so remove the 'uart-has-rtscts' property to make the hardware description correct. Documentation/devicetree/bindings/serial/serial.txt states that 'uart-has-rtscts' and 'rts-gpios' properties are mutually exclusive. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-07-22ARM: dts: rockchip: fix property-ordering in rv1108 mmc nodesHeiko Stuebner1-9/+9
Somehow the strange property ordering of the rv1108 mmc nodes slipped through when it was added. To lessen the confusion in the future, do the needed reordering to bring them in line with our regular order. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-07-22ARM: dts: rockchip: enable sdmmc for rv1108 evbAndy Yan2-0/+6
Enable sdmmc on rv1108 evaluation board. Also add pinctrl for sdmmc controller. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-07-22cpufreq: dt: Don't use generic platdev driver for tangoMarc Gonzalez1-1/+0
On tango platforms, firmware configures the CPU clock, and Linux is then only allowed to use the cpu_clk_divider to change the frequency. Build the OPP table dynamically at init, in order to support whatever firmware throws at us. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-07-21ARM: dts: keystone-k2g: Add TI SCI reset-controller nodeAndrew F. Davis1-0/+5
Add a reset-controller node for managing resets of various remote processor devices on the SoC over the Texas Instrument's System Control Interface (TI SCI) protocol. Signed-off-by: Andrew F. Davis <afd@ti.com> [s-anna@ti.com: rename node name, drop obsolete header] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-07-21ARM: dts: keystone-k2g: Add ti-sci clock provider nodeTero Kristo1-0/+5
Add a ti-sci node representing the clock provider in the system. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-07-21ARM: dts: keystone-k2g: Add ti-sci power domain nodeDave Gerlach1-0/+5
Add a ti-sci k2g_pds node to act as our generic power domain provider in the system. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-07-21ARM: dts: keystone-k2g: Add PMMC node to support TI-SCI protocolNishanth Menon1-0/+14
Texas Instrument's System Control Interface (TI-SCI) Message Protocol is implemented in Keystone 2 generation 66AK2G SoC with the PMMC entity. Add the ti-sci node representing this 66AK2G PMMC module. Signed-off-by: Nishanth Menon <nm@ti.com> [s-anna@ti.com: add unit address to DT node] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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