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The AM57xx GP EVM boards are built on top the AM57xx BeagleBoard-X15.
The EVM extends the BeagleBoard by adding a touchscreen, some buttons,
and a handful of peripheral extension slots.
Being a plugin extension of an existing standalone board; we define
the am57xx-evm as a composite-DTB of the base am57xx-beagle-x15
and a new am57xx-evm overlay.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Message-Id: <20230307161715.15209-2-afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add a devicetree for the Tolino Vision Ebook reader. It is based
on boards marked with "37NB-E60Q30+4A3". It is equipped with an i.MX6SL
SoC.
Expected to work:
- Buttons
- Wifi
- LEDs
- uSD
- eMMC
- USB
- RTC
- Touchscreen
- Backlight
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The PCB used for all the current boards (Ursa, Draco, Hydra, Orion, Crux)
was slightly redesigned and delivers some new features while some unused
components were removed.
- External RTC chip with supercap added.
- Secure element added.
- LCD display power supply enable/disable signal added.
- Touch keyboard reset and interrupt signals added.
- Factory reset GPIO button added.
- Audio codec LM49350 (EoL) removed and replaced by PWM audio output.
- QCA8334 switch was replaced by Marvell 88E6141.
- PCIe completely removed.
- uSD card removed and replaced by board-to-board expansion connector.
There are four configuration variants of the new board:
1. Pegasus
The board configuration is based on Orion with the following major changes:
- Quad core SoC
- 4GB of RAM
- RTC with supercap added
- Secure element added
2. Pegasus+
This is the very same board as Pegasus but uses the i.MX6QuadPlus SoC.
3. Lynx
The board configuration is based on Draco with the following major changes:
- DualLite SoC
- 1GB of RAM
- RTC with supercap added
- Secure element added
4. Phoenix
The board configuration is based on Ursa with the following major changes:
- DualLite Soc
- 1GB of RAM
- RTC with supercap added
- Secure element added
- LCD display support removed
- UART2 removed
- Factory reset GPIO button added
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Explicit status = "okay" is not needed as it is the default.
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The status property should always be last in the list.
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Drop the phy-reset-duration and phy-reset-gpios deprecated properties and
move reset-gpios under the switch node.
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM DTS for v6.4
1. TI, Marvell, HiSilicon: "okay" over "ok" is preferred for status
property.
2. OMAP: align UART node name with bindings.
* tag 'dt-cleanup-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
ARM: dts: hisilicon: use "okay" for status
ARM: dts: ti: use "okay" for status
ARM: dts: marvell: use "okay" for status
ARM: dts: omap: align UART node name with bindings
Link: https://lore.kernel.org/r/20230319152740.34551-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/fixes
Qualcomm ARM32 Devicetree fixes for v6.3
This introduces missing reserved-memory ranges on LG G Watch R,
resolving stability issues caused by Linux reusing memory used by
firmware.
* tag 'qcom-dts-fixes-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: apq8026-lg-lenok: add missing reserved memory
Link: https://lore.kernel.org/r/20230323141922.1085875-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The Lctech Pi F1C200s (also previously known under the Cherry Pi brand)
is a small development board with the Allwinner F1C200s SoC. This is the
same as the F1C100s, but with 64MB instead of 32MB co-packaged DRAM.
Alongside the obligatory micro-SD card slot, the board features a
SPI-NAND flash chip, LCD and touch connectors, and unpopulated
expansion header pins.
There are two USB Type-C ports on the board: One supplies the power, also
connects to the USB MUSB OTG controller port. The other one is connected
to an CH340 USB serial chip, which in turn is connected to UART1.
Add a devicetree file, so that the board can be used easily.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20230319212936.26649-7-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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PopStick is a minimal Allwinner F1C200s dongle, with its USB controller
wired to a USB Type-A plug, a SD slot and a SPI NAND flash on board, and
an on-board CH340 USB-UART converted connected to F1C200s's UART0.
Add a device tree for it. As F1C200s is just F1C100s with a different
DRAM chip co-packaged, directly use F1C100s DTSI here.
This commit covers the v1.1 version of this board, which is now shipped.
v1.0 is some internal sample that have not been shipped at all.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20230319212936.26649-6-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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Lichee Pi Nano has a Micro-USB connector, with its D+, D- pins connected
to the USB pins of the SoC and ID pin connected to PE2 GPIO.
Enable the USB functionality.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20230319212936.26649-3-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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The suniv SoC has a USB OTG controller and a USB PHY like other
Allwinner SoCs.
Add their device tree node.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20230319212936.26649-2-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
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With the conversion of rockchip,analogix-dp.yaml a port@1 node
is required, so add a node with label edp_out.
Also restyle.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/0a423eb4-0ab6-7ecb-d450-d93639160dbc@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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With the conversion of rockchip,lvds.yaml a port@1 node
is required, so add a node with label lvds_out.
Also restyle.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/e7b78a73-0e89-d9e9-2ecc-a8a380635f64@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Use generic node name for rk3288.dtsi dsi node.
With the conversion of rockchip,dw-mipi-dsi.yaml a port@1 node
is required, so add a node with label mipi_out.
Also restyle.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/f3edcbff-4aef-1d24-8d65-e519c9451cda@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The MXIII Plus uses an Ampak AP6330 Bluetooth and WiFi combo chip.
Bluetooth is connected to &uart_A and requires toggling GPIOX_20.
WiFi can be routed to either &sdhc or &sdio. Route WiFi to &sdhc
since &sdio is already connected to the SD card. Additionally WiFi
requires toggling GPIOX_11 and GPIOAO_6 as well as enabling the 32kHz
clock signal.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230321171213.2808460-4-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add the pins for the SDHC MMC controller which connect to the SDIO wifi
on some boards.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230321171213.2808460-3-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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GPIOX_10 can generate a 32768Hz signal when enabling the "xtal_32k_out"
group with the xtal function. This is typically used as LPO clock for
the SDIO wifi chips.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230321171213.2808460-2-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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syscon should not be used alone as compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230306072618.10770-2-krzysztof.kozlowski@linaro.org
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To support the detach feature, add a new mailbox channel to inform
the remote processor on a detach. This signal allows the remote processor
firmware to stop IPC communication and to reinitialize the resources for
a re-attach.
See 6257dfc1c412dcdbd76ca5fa92c8444222dbe5b0 for a patch that does the
same for stm32mp15x-dkx boards.
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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"okay" over "ok" is preferred for status property.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230127101832.93789-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230310231420.583121-1-linus.walleij@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add a device node for the M24C01 I2C EEPROM which serves as external
storage for the Ethernet MAC address.
While at it, restore sort order (by unit address) of the devices on the
I2C bus.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6d402b289fd20125d9f6f6b2a4f239aa1887daa6.1678375464.git.geert+renesas@glider.be
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To align with rest of the devicetree files, let's move the "status"
property down
Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308082424.140224-11-manivannan.sadhasivam@linaro.org
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Enable PCIe RC support on Thundercomm T55 board.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308082424.140224-10-manivannan.sadhasivam@linaro.org
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To align with the rest of the devicetree files and the relative properties,
let's list the values of properties such as {reg/clock/interrupt}-names
vertically.
Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308082424.140224-9-manivannan.sadhasivam@linaro.org
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The PCIe controller in SDX55 can act as the RC controller also. Let's
add support for it.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308082424.140224-8-manivannan.sadhasivam@linaro.org
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There is only one PCIe PHY in this SoC, so there is no need to add an
index to the suffix. This also matches the naming convention of the PCIe
controller.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308082424.140224-7-manivannan.sadhasivam@linaro.org
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Unit address of PCIe EP node should be 0x1c00000 as it has to match the
first address specified in the reg property.
This also requires sorting the node in the ascending order.
Fixes: e6b69813283f ("ARM: dts: qcom: sdx55: Add support for PCIe EP")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308082424.140224-6-manivannan.sadhasivam@linaro.org
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For 64KiB of the I/O region, the I/O ports of the legacy PCI devices are
located in the range of 0x0 to 0x10000. Hence, fix the bogus PCI addresses
(0x0fe00000, 0x31e00000, 0x35e00000) specified in the ranges property for
I/O region.
While at it, let's use the missing 0x prefix for the addresses.
Fixes: 93241840b664 ("ARM: dts: qcom: Add pcie nodes for ipq8064")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230228164752.55682-17-manivannan.sadhasivam@linaro.org
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For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are
located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI address
(0x40200000) specified in the ranges property for I/O region.
While at it, let's use the missing 0x prefix for the addresses.
Fixes: 187519403273 ("ARM: dts: ipq4019: Add a few peripheral nodes")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230228164752.55682-16-manivannan.sadhasivam@linaro.org
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To maintain the uniformity, let's use the 0x prefix for the values of
ranges property.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230228164752.55682-15-manivannan.sadhasivam@linaro.org
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Change the XO clock in MSM8974's GCC node to point to RPMCC.
Signed-off-by: Rayyan Ansari <rayyan@ansari.sh>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230121192540.9177-4-rayyan@ansari.sh
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Add the XO and Sleep Clock sources to the GCC node on MSM8226.
Signed-off-by: Rayyan Ansari <rayyan@ansari.sh>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230121192540.9177-3-rayyan@ansari.sh
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Change kpss-acc-v2 nodes naming to power-manager to reflect Documentation
schema.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230116204751.23045-8-ansuelsmth@gmail.com
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Add missing clock configuration by adding clocks, clock-names,
clock-output-names and #clock-cells bindings for each kpss-acc-v1
clock-controller to reflect Documentation schema.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230116204751.23045-7-ansuelsmth@gmail.com
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Add missing clock configuration by adding clocks, clock-names
and #clock-cells bindings for each kpss-acc-v1 clock-controller
node for apq8064 and msm8960 to reflect Documentation schema.
Add missing #clock-cells binding and remove useless clock-output-names for
ipq806x dtsi.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230116204751.23045-6-ansuelsmth@gmail.com
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Add per Soc compatible for qcom,kpss-gcc nodes. While currently not used
by the kpss driver they can serve further customization and they are
required to be defined per Documentation schema.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230116204751.23045-5-ansuelsmth@gmail.com
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All of them have an internal emmc that becomes mmc0 and
devices including the sdmmc snippet get mmc1 for the external
sd slot on suitable devices.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20230307095516.4116827-1-heiko@sntech.de
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Add support for HSSPI controller in ARMv7 chip dts files.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-4-william.zhang@broadcom.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Replace the license blob by a clean SPDX-License-Identifier with GPL2
or MIT even if X11 is specified in the original blob since the actual
license text corresponds to a MIT license.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This Technologic board file still use node name and unit address
to reference parts from the imx28.dtsi . This causes a lot of
redundancy. So use label references in order to make it easier
to maintain.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This Freescale board file still use node name and unit address
to reference parts from the imx28.dtsi . This causes a lot of
redundancy. So use label references in order to make it easier
to maintain.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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All additional I2SE Duckbill 2 variants always have the same
base board in common. So consider this by including the base
board and avoid a lot of redundancy.
Special care needs to be taken of the SPI variant. ssp2 is used
as SD card interface on the base board, but on the SPI variant
it's downgrade to a SPI interface to connect the QCA7000. So
the SD card properties must be deleted.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Michael Heimpold <mhei@heimpold.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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These I2SE board files still use node name and unit address
to reference parts from the imx28.dtsi . This causes a lot of
redundancy. So use label references in order to make it easier
to maintain.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Michael Heimpold <mhei@heimpold.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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These Crystal fontz board files still use node name and unit
address to reference parts from the imx28.dtsi . This causes
a lot of redundancy. So use label references in order to make
it easier to maintain.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Brian Lilly <brian@crystalfontz.com>
Cc: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This board file still use node name and unit address to
reference parts from the imx28.dtsi . This causes a lot of
redundancy. So use label references in orer to make it
easier to maintain.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Aapo Vienamo <aapo.vienamo@iki.fi>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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These board files still use node name and unit address to
reference parts from the imx28.dtsi . This causes a lot of
redundancy. So use label references in orer to make it
easier to maintain.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Grandegger <wg@aries-embedded.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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These Armadeus board files still use node name and unit address
to reference parts from the imx28.dtsi . This causes a lot of
redundancy. So use label references in order to make it easier
to maintain.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: <support@armadeus.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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usb@2184000: 'pinctrl-0' is a dependency of 'pinctrl-names'
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fixes: 9c7016f1ca6d ("ARM: dts: imx: add devicetree for Tolino Shine 2 HD")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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usb@2184000: 'pinctrl-0' is a dependency of 'pinctrl-names'
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fixes: c100ea86e6ab ("ARM: dts: add Netronix E60K02 board common file")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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