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While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Link: https://lore.kernel.org/r/20200830191643.20717-1-freifunk@adrianschmutzler.de
[bjorn: Rebased and included fixup of sdx55-mtp]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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This adds some additional DT labels which are handy when referring
to the nodes in derived DTS(I) files. It will also make the
definitions more consistent, e.g. by adding gsbi2_serial and
gsbi5_serial where we previously "only" had gsbi4_serial defined.
While at it, add missing spaces after some DT labels and remove one
useless empty line.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Link: https://lore.kernel.org/r/20200902165159.7733-1-freifunk@adrianschmutzler.de
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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This property appears to be commented out, so we can remove it
as well.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Link: https://lore.kernel.org/r/20200902165159.7733-2-freifunk@adrianschmutzler.de
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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ALFA Network AP120C-AC is a dual-band ceiling AP, based on Qualcomm
IPQ4018 + QCA8075 platform.
Specification:
- Qualcomm IPQ4018 (717 MHz)
- 256 MB of RAM (DDR3)
- 16 MB (SPI NOR) + 128 or 512 MB (SPI NAND) of flash
- 2x Gbps Ethernet, with 802.3af PoE support in one port
- 2T2R 2.4/5 GHz (IPQ4018), with ext. FEMs (QFE1952, QFE1922)
- 3x U.FL connectors
- 1x 1.8 dBi (Bluetooth) and 2x 3/5 dBi dual-band (Wi-Fi) antennas
- Atmel/Microchip AT97SC3205T TPM module (I2C bus)
- TI CC2540 Bluetooth LE module (USB 2.0 bus)
- 1x button (reset)
- 1x USB 2.0
- DC jack for main power input (12 V)
- UART header available on PCB (2.0 mm pitch)
This adds DTS for both the generic and custom Bit edition for Sartura.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Link: https://lore.kernel.org/r/20200909195640.3127341-4-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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8devices Jalapeno is a dual-band SoM, based on Qualcomm
IPQ4018 + QCA8072 platform.
Specification:
QCA IPQ4018, Quad core ARM v7 Cortex A7 717MHz
256 MB of DDR3 RAM
8 MB of SPI NOR flash
128 MB of Winbond SPI NAND flash
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2
ETH: Qualcomm Atheros QCA8072 Gigabit Switch (1 x LAN, 1 x WAN)
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Link: https://lore.kernel.org/r/20200909195640.3127341-3-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Lets add labels to more commonly used nodes for easier modification in board DTS files.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Link: https://lore.kernel.org/r/20200909195640.3127341-2-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Since we now have driver for the USB PHY, and USB controller is already supported by the DWC3 driver lets add the necessary nodes to DTSI.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200909163831.1894142-1-robert.marko@sartura.hr
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add missing prng definition for ipq806x SoC
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Link: https://lore.kernel.org/r/20200705142544.GA3389@earth.li
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add support for pshold block to drive pshold towards the PMIC, which is
used to trigger a configurable event such as reboot or poweroff of the
SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-7-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Enable Watchdog support for Application Processor Subsystem (APSS) block
on SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-6-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Enable the support for USB3 controller, QMP PHY and HS PHY on SDX55 MTP.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and
SNPS HS PHY on SDX55.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-3-manivannan.sadhasivam@linaro.org
[bjorn: Added missing #power-domain-cells to &gcc]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Since commit fa2d0aa96941 ("mmc: core: Allow setting slot index
via device tree alias") proper aliases should be named "mmcN".
Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Link: https://lore.kernel.org/r/20210110185835.133059-1-alexeymin@postmarketos.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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This adds the regulators found on SDX55 MTP.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-19-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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SDX55-mtp features PMX55 pmic, so include the dts as well
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-16-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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This adds DTS for PMIC PMX55 found in Qualcomm platforms.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-18-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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This adds rpmpd node and opps for this node to the SDX55 dts.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-17-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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SDX55-mtp features PM8150B pmic, so include the dts as well
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-15-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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This adds SPMI node to SDX55 dts.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-14-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Enable QPIC NAND on SDX55-MTP board.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210106125322.61840-13-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Enable BAM DMA on SDX55-MTP board.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210106125322.61840-12-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add qpic_nand node to support QPIC NAND controller on SDX55 platform.
Since there is no "aon" clock in SDX55, a dummy clock is provided.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-11-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add qpic_bam node to support QPIC BAM DMA controller on SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210106125322.61840-10-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add smem node to support shared memory manager on SDX55 platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210106125322.61840-9-manivannan.sadhasivam@linaro.org
[bjorn: Moved smem node out from /soc]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add TCSR Mutex node to support Qualcomm Hardware Mutex block on SDX55
platform.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-8-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add a node for the ARM SMMU found in the SDX55.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-7-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add devicetree support for SDHCI controller found in Qualcomm SDX55
platform. The SDHCI controller is based on the MSM SDHCI v5 IP.
Hence, the support is added by reusing the existing sdhci driver with
"qcom,sdhci-msm-v5" as the fallback.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-5-manivannan.sadhasivam@linaro.org
[bjorn: added include of qcom,gcc-sdx55.h]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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This adds reserved memory nodes to the SDX55 dtsi as defined by v6 of
the memory map
Signed-off-by: Vinod Koul <vkoul@kernel.org>
[mani: moved modem regions to board dts]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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This adds pincontrol node to SDX55 dts.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Add basic devicetree support for SDX55 platform and MTP board from
Qualcomm. The SDX55 platform features an ARM Cortex A7 CPU which forms
the Application Processor Sub System (APSS) along with standard Qualcomm
peripherals like GCC, TLMM, BLSP, QPIC, and BAM etc... Also, there
exists the networking parts such as IPA, MHI, PCIE-EP, EMAC, and Modem
etc..
Currently, this basic devicetree support includes GCC, RPMh clock, INTC
and Debug UART.
Co-developed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201126083138.47047-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Pull ARM updates from Russell King:
- Rework phys/virt translation
- Add KASan support
- Move DT out of linear map region
- Use more PC-relative addressing in assembly
- Remove FP emulation handling while in kernel mode
- Link with '-z norelro'
- remove old check for GCC <= 4.2 in ARM unwinder code
- disable big endian if using clang's linker
* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (46 commits)
ARM: 9027/1: head.S: explicitly map DT even if it lives in the first physical section
ARM: 9038/1: Link with '-z norelro'
ARM: 9037/1: uncompress: Add OF_DT_MAGIC macro
ARM: 9036/1: uncompress: Fix dbgadtb size parameter name
ARM: 9035/1: uncompress: Add be32tocpu macro
ARM: 9033/1: arm/smp: Drop the macro S(x,s)
ARM: 9032/1: arm/mm: Convert PUD level pgtable helper macros into functions
ARM: 9031/1: hyp-stub: remove unused .L__boot_cpu_mode_offset symbol
ARM: 9044/1: vfp: use undef hook for VFP support detection
ARM: 9034/1: __div64_32(): straighten up inline asm constraints
ARM: 9030/1: entry: omit FP emulation for UND exceptions taken in kernel mode
ARM: 9029/1: Make iwmmxt.S support Clang's integrated assembler
ARM: 9028/1: disable KASAN in call stack capturing routines
ARM: 9026/1: unwind: remove old check for GCC <= 4.2
ARM: 9025/1: Kconfig: CPU_BIG_ENDIAN depends on !LD_IS_LLD
ARM: 9024/1: Drop useless cast of "u64" to "long long"
ARM: 9023/1: Spelling s/mmeory/memory/
ARM: 9022/1: Change arch/arm/lib/mem*.S to use WEAK instead of .weak
ARM: kvm: replace open coded VA->PA calculations with adr_l call
ARM: head.S: use PC relative insn sequence to calculate PHYS_OFFSET
...
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The DTB magic marker is stored as a 32-bit big-endian value, and thus
depends on the CPU's endianness. Add a macro to define this value in
native endianness, to reduce #ifdef clutter and (future) duplication.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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The dbgadtb macro is passed the size of the appended DTB, not the end
address.
Fixes: c03e41470e901123 ("ARM: 9010/1: uncompress: Print the location of appended DTB")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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DTB stores all values as 32-bit big-endian integers.
Add a macro to convert such values to native CPU endianness, to reduce
duplication.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC OMAP GenPD updates from Arnd Bergmann:
"These are additional updates for the power domain support on OMAP,
moving to an implementation based on device tree information instead
of SoC specific code. This is the latest step in the ongoing process
for moving code out of arch/arm/mach-omap2.
I kept this separate from the other driver changes since it touches
code in multiple areas"
* tag 'arm-soc-omap-genpd-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (51 commits)
ARM: OMAP2+: Fix am4 only build after genpd changes
ARM: dts: Configure power domain for omap5 dss
ARM: dts: omap5: add remaining PRM instances
soc: ti: omap-prm: omap5: add genpd support for remaining PRM instances
ARM: OMAP2+: Drop legacy platform data for dra7 gpmc
ARM: dts: Configure interconnect target module for dra7 iva
ARM: dts: dra7: add remaining PRM instances
soc: ti: omap-prm: dra7: add genpd support for remaining PRM instances
clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks
ARM: OMAP2+: Drop legacy platform data for omap4 gpmc
ARM: OMAP2+: Drop legacy platform data for omap4 iva
ARM: dts: Configure power domain for omap4 dsp
ARM: dts: Configure power domain for omap4 dss
ARM: dts: omap4: add remaining PRM instances
soc: ti: omap-prm: omap4: add genpd support for remaining PRM instances
clk: ti: omap4: Drop idlest polling from IVA clkctrl clocks
ARM: OMAP2+: Drop legacy remaining legacy platform data for am4
ARM: dts: Use simple-pm-bus for genpd for am4 l3
ARM: dts: Move am4 l3 noc to a separate node
ARM: dts: Use simple-pm-bus for genpd for am4 l4_per
...
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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"There are a couple of subsystems maintained by other people that merge
their drivers through the SoC tree, those changes include:
- The SCMI firmware framework gains support for sensor notifications
and for controlling voltage domains.
- A large update for the Tegra memory controller driver, integrating
it better with the interconnect framework
- The memory controller subsystem gains support for Mediatek MT8192
- The reset controller framework gains support for sharing pulsed
resets
For Soc specific drivers in drivers/soc, the main changes are
- The Allwinner/sunxi MBUS gets a rework for the way it handles
dma_map_ops and offsets between physical and dma address spaces.
- An errata fix plus some cleanups for Freescale Layerscape SoCs
- A cleanup for renesas drivers regarding MMIO accesses.
- New SoC specific drivers for Mediatek MT8192 and MT8183 power
domains
- New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC
identification.
- Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and
SDX55.
- A rework of the TI AM33xx 'genpd' power domain support to use
information from DT instead of platform data
- Support for TI AM64x SoCs
- Allow building some Amlogic drivers as modules instead of built-in
Finally, there are numerous cleanups and smaller bug fixes for
Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips,
Renesas, and Xilinx SoCs"
* tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (222 commits)
soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS
firmware: xilinx: Properly align function parameter
firmware: xilinx: Add a blank line after function declaration
firmware: xilinx: Remove additional newline
firmware: xilinx: Fix kernel-doc warnings
firmware: xlnx-zynqmp: fix compilation warning
soc: xilinx: vcu: add missing register NUM_CORE
soc: xilinx: vcu: use vcu-settings syscon registers
dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding
soc: xilinx: vcu: drop useless success message
clk: samsung: mark PM functions as __maybe_unused
soc: samsung: exynos-chipid: initialize later - with arch_initcall
soc: samsung: exynos-chipid: order list of SoCs by name
memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe()
memory: ti-emif-sram: only build for ARMv7
memory: tegra30: Support interconnect framework
memory: tegra20: Support hardware versioning and clean up OPP table initialization
dt-bindings: memory: tegra20-emc: Document opp-supported-hw property
soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe()
reset-controller: ti: force the write operation when assert or deassert
...
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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM device tree updates from Arnd Bergmann:
"Across all platforms, there is a continued move towards DT schema for
validating the dts files. As a result there are bug fixes for mistakes
that are found using these schema, in addition to warnings from the
dtc compiler.
As usual, many changes are for adding support for additional on-chip
and on-board components in the machines we already support.
The newly supported SoCs for this release are:
- MStar Infinity2M, a low-end IP camera chip based on a dual-core
Cortex-A7, otherwise similar to the Infinity chip we already
support. This is also known as the SigmaStar SSD202D, and we add
support for the Honestar ssd201htv2 development kit.
- Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller
(BMC), in the same family as the NPCM750. This gets used in the
Ampere Altra based "Fii Kudo" server and the Quanta GSJ, both of
which are added as well.
- Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own
Brahma-B53 CPU. Support is also added for the Asus ROG Rapture
GT-AC5300 high-end WiFi router based on this chip.
- Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores,
meant for faster Chromebooks and tablets. It gets added along with
its reference design.
- Mediatek MT6779 (Helio P90) is a high-end phone chip from last
year's generation, also added along with its reference board. This
one is still based on Cortex-A75/A55.
- Mediatek MT8167 is a version of the already supported MT8516 chip,
both based on Cortex-A35. It gets added along with the "Pumpkin"
single board computer, but is likely to also make its way into
low-end tablets in the future.
For the already supported chips, there are a number of new boards.
Interestingly there are more 32-bit machines added this time than
64-bit. Here is a brief list of the new boards:
- Three new Mikrotik router variants based on Marvell Prestera
98DX3236, a close relative of the more common Armada XP
- A reference board for the Marvell Armada 382
- Three new servers using ASpeed baseboard management controllers,
the actual machines being from Bytedance, Facebook and IBM, and one
machine using the Nuvoton NPCM750 BMC.
- The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412.
- The usual set of 32-bit i.MX industrial/embedded hardware:
* Protonic WD3 (tractor e-cockpit)
* Kamstrup OMNIA Flex Concentrator (smart grid platform)
* Van der Laan LANMCU (food storage)
* Altesco I6P (vehicle inspection stations)
* PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard
- DH electronics STM32MP157C DHCOM, a PicoITX carrier board for the
aleady supported DHCOM module
- Three new Allwinner SoC based single-board computers:
* NanoPi R1 (H3 based)
* FriendlyArm ZeroPi (H3 based)
* Elimo Initium SBC (S3 based)
- Ouya Game Console based on Nvidia Tegra 3
- Version 5 of the already supported Zynq Z-Turn MYIR Board
- LX2162AQDS, a reference platform for NXP Layerscape LX2162A, which
is a repackaged 16-core LX2160A
- A series of Kontron i.MX8M Mini baseboard/SoM versions
- Espressobin Ultra, a new variant of the popular Armada 3700 based
board,
- IEI Puzzle-M801, a rackmount network appliance based on Marvell
Armada 8040
- Microsoft Lumia 950 XL, a phone
- HDK855 and HDK865 Hardware development kits for Qualcomm sm8250 and
sm8150, respectively
- Three new board variants of the "Trogdor" Chromebook (sc7180)
- New board variants of the Renesas based "Kingfisher" and "HiHope"
reference boards
- Kobol Helios64, an open source NAS appliance based on Rockchips
RK3399
- Engicam PX30.Core, a SoM based on Rockchip PX30, along with a few
carrier boards"
* tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (679 commits)
arm64: dts: sparx5: Add SGPIO devices
arm64: dts: sparx5: Add reset support
dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver
ARM: mstar: SMP support
ARM: mstar: Wire up smpctrl for SSD201/SSD202D
ARM: mstar: Add smp ctrl registers to infinity2m dtsi
ARM: mstar: Add dts for Honestar ssd201htv2
ARM: mstar: Add chip level dtsi for SSD202D
ARM: mstar: Add common dtsi for SSD201/SSD202D
ARM: mstar: Add infinity2m support
dt-bindings: mstar: Add Honestar SSD201_HT_V2 to mstar boards
dt-bindings: vendor-prefixes: Add honestar vendor prefix
dt-bindings: mstar: Add binding details for mstar,smpctrl
ARM: mstar: Fill in GPIO controller properties for infinity
ARM: mstar: Add gpio controller to MStar base dtsi
ARM: zynq: Fix incorrect reference to XM013 instead of XM011
ARM: zynq: Convert at25 binding to new description on zc770-xm013
ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
ARM: zynq: Fix leds subnode name for zc702/zybo-z7
ARM: zynq: Rename bus to be align with simple-bus yaml
...
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git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
- Add vendor prefixes for bm, gpio-key, mentor, FII, and Ampere
- Add ADP5585/ADP5589 and delta,q54sj108a2 to trivial-devices.yaml
- Convert fixed-partitions, i2c-gate and fsl,dpaa2-console bindings to
schemas
- Drop PicoXcell bindings
- Drop unused and undocumented 'pnx,timeout' property from LPC32xx
- Add 'dynamic-power-coefficient' to Mali GPU bindings
- Make 'make dt_binding_check' not error out on warnings
- Various minor binding fixes
* tag 'devicetree-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (22 commits)
dt-bindings: mali-bifrost: Add dynamic-power-coefficient
dt-bindings: mali-midgard: Add dynamic-power-coefficient
dt-bindings: i2c: dw: cancel mandatory requirements for "#address-cells" and "#size-cells"
dt-bindings: Remove PicoXcell bindings
ARM: dts: lpc32xx: Remove unused and undocumented 'pnx,timeout'
dt-bindings: mtd: convert "fixed-partitions" to the json-schema
dt-bindings: vendor-prefixes: Add undocumented bm, gpio-key, and mentor prefixes
dt-bindings: pci: rcar-pci-ep: Document missing interrupts property
dt-bindings: vendor-prefixes: Add an entry for AmpereComputing.com
dt-bindings: vendor-prefixes: correct the spelling of TQ-Systems GmbH
dt-bindings: mfd: fix stm32 timers example
dt-bindings: trivial-devices: Add delta,q54sj108a2
dt-bindings:i2c:i2c-gate: txt to yaml conversion
dt-bindings: add ADP5585/ADP5589 entries to trivial-devices
dt-bindings: Correct GV11B GPU register sizes
dt-bindings: vendor-prefixes: Add FII
dt-bindings: Fix typo on the DesignWare IP reset bindings documentation
dt-bindings: Fix error in 'make dtbs_check' when using DT_SCHEMA_FILES
dt-bindings: arm: vt8500: remove redundant white-spaces
dt-bindings: fsl-imx-drm: fix example compatible string
...
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git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
Pull input updates from Dmitry Torokhov:
- support for inhibiting input devices at request from userspace. If a
device implements open/close methods, it can also put device into low
power state. This is needed, for example, to disable keyboard and
touchpad on convertibles when they are transitioned into tablet mode
- now that ordinary input devices can be configured for polling mode,
dedicated input polling device implementation has been removed
- GTCO tablet driver has been removed, as it used problematic custom
HID parser, devices are EOL, and there is no interest from the
manufacturer
- a new driver for Dialog DA7280 haptic chips has been introduced
- a new driver for power button on Dell Wyse 3020
- support for eKTF2132 in ektf2127 driver
- support for SC2721 and SC2730 in sc27xx-vibra driver
- enhancements for Atmel touchscreens, AD7846 touchscreens, Elan
touchpads, ADP5589, ST1232 touchscreen, TM2 touchkey drivers
- fixes and cleanups to allow clean builds with W=1
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: (86 commits)
Input: da7280 - fix spelling mistake "sequemce" -> "sequence"
Input: cyapa_gen6 - fix out-of-bounds stack access
Input: sc27xx - add support for sc2730 and sc2721
dt-bindings: input: Add compatible string for SC2721 and SC2730
dt-bindings: input: Convert sc27xx-vibra.txt to json-schema
Input: stmpe - add axis inversion and swapping capability
Input: adp5589-keys - do not explicitly control IRQ for wakeup
Input: adp5589-keys - do not unconditionally configure as wakeup source
Input: ipx4xx-beeper - convert comma to semicolon
Input: parkbd - convert comma to semicolon
Input: new da7280 haptic driver
dt-bindings: input: Add document bindings for DA7280
MAINTAINERS: da7280 updates to the Dialog Semiconductor search terms
Input: elantech - fix protocol errors for some trackpoints in SMBus mode
Input: elan_i2c - add new trackpoint report type 0x5F
Input: elants - document some registers and values
Input: atmel_mxt_ts - simplify the return expression of mxt_send_bootloader_cmd()
Input: imx_keypad - add COMPILE_TEST support
Input: applespi - use new structure for SPI transfer delays
Input: synaptics-rmi4 - use new structure for SPI transfer delays
...
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git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
Pull EDAC updates from Borislav Petkov:
"Somewhat busier than usual this cycle:
- Add support for AST2400 and AST2600 hw to aspeed_edac (Troy Lee)
- Remove an orphaned mv64x60_edac driver. Good riddance (Michael
Ellerman)
- Add a new igen6 driver for Intel client SoCs with an integrated
memory controller and using in-band ECC (Qiuxu Zhuo and Tony Luck)
- The usual smattering of fixes and cleanups all over"
* tag 'edac_updates_for_v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
EDAC/mv64x60: Remove orphan mv64x60 driver
EDAC/aspeed: Add support for AST2400 and AST2600
ARM: dts: aspeed: Add AST2600 EDAC into common devicetree
dt-bindings: edac: aspeed-sdram-edac: Add ast2400/ast2600 support
EDAC/amd64: Fix PCI component registration
EDAC/igen6: ecclog_llist can be static
EDAC/i10nm: Add Intel Sapphire Rapids server support
EDAC: Add DDR5 new memory type
EDAC/i10nm: Use readl() to access MMIO registers
MAINTAINERS: Add entry for Intel IGEN6 EDAC driver
EDAC/igen6: Add debugfs interface for Intel client SoC EDAC driver
EDAC/igen6: Add EDAC driver for Intel client SoCs using IBECC
EDAC/synopsys: Return the correct value in mc_probe()
MAINTAINERS: Clean up the F: entries for some EDAC drivers
EDAC: Add three new memory types
EDAC: Fix some kernel-doc markups
EDAC: Do not issue useless debug statements in the polling routine
EDAC/amd64: Remove unneeded breaks
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'pnx,timeout' is unused, undocumented and 'pnx' is not a vendor prefix,
so let's remove it.
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Sylvain Lemieux <slemieux.tyco@gmail.com>
Link: https://lore.kernel.org/r/20201210175238.2721550-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
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The check_spi_bus_bridge() in scripts/dtc/checks.c requires that the node
have "spi-slave" property must with "#address-cells = <0>" and
"#size-cells = <0>". But currently both "#address-cells" and "#size-cells"
properties are deleted, the corresponding default values are 2 and 1. As a
result, the check fails and below warnings is displayed.
arch/arm/boot/dts/mmp2.dtsi:472.23-480.6: Warning (spi_bus_bridge): \
/soc/apb@d4000000/spi@d4037000: incorrect #address-cells for SPI bus
also defined at arch/arm/boot/dts/mmp2-olpc-xo-1-75.dts:225.7-237.3
arch/arm/boot/dts/mmp2.dtsi:472.23-480.6: Warning (spi_bus_bridge): \
/soc/apb@d4000000/spi@d4037000: incorrect #size-cells for SPI bus
also defined at arch/arm/boot/dts/mmp2-olpc-xo-1-75.dts:225.7-237.3
arch/arm/boot/dts/mmp2-olpc-xo-1-75.dtb: Warning (spi_bus_reg): \
Failed prerequisite 'spi_bus_bridge'
Because the value of "#size-cells" is already defined as zero in the node
"ssp3: spi@d4037000" in arch/arm/boot/dts/mmp2.dtsi. So we only need to
explicitly add "#address-cells = <0>" and keep "#size-cells" no change.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Link: https://lore.kernel.org/r/20201207084752.1665-2-thunder.leizhen@huawei.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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arm/dt
ARM: dts: zynq: DT changes for v5.11
- Adding support for Zturn-v5
- Small DT changes to clean errors from dt_binding_check
* tag 'zynq-dt-for-v5.10' of https://github.com/Xilinx/linux-xlnx:
ARM: zynq: Fix incorrect reference to XM013 instead of XM011
ARM: zynq: Convert at25 binding to new description on zc770-xm013
ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
ARM: zynq: Fix leds subnode name for zc702/zybo-z7
ARM: zynq: Rename bus to be align with simple-bus yaml
ARM: zynq: Fix compatible string for adi,adxl345 chip
ARM: zynq: Add Z-turn board V5
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git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt
ASPEED device tree updates for 5.11
- New machines
* Bytedance G220A, an AST2500 BMC for an x86 server
* Facebook Galaxy100, an AST2400 BMC for a network switch
* IBM Rainier 4U, an AST2600 BMC for a PowerPC server
- Reworking of Facebook device trees to use common dtsi
- A 64MB flash layout used by the G220A
- Misc updates to tiogapass, ethanolx, s2600wf, tacoma and rainier
* tag 'aspeed-5.11-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: (25 commits)
ARM: dts: aspeed: ast2600evb: Add MAC0
ARM: dts: aspeed: rainier: Don't shout addresses
ARM: dts: aspeed: rainier: Mark FSI SPI controllers as restricted
ARM: dts: tacoma: Add reserved memory for ramoops
ARM: dts: rainier: Add reserved memory for ramoops
ARM: dts: tacoma: Fix node vs reg mismatch for flash memory
ARM: dts: aspeed: rainier: Add 4U device-tree
arm: dts: aspeed: tiogapass: Enable second MAC
ARM: dts: aspeed: minipack: Fixup I2C tree
ARM: dts: aspeed: wedge400: Fix FMC flash0 layout
ARM: dts: aspeed: Add Facebook Galaxy100 (AST2400) BMC
ARM: dts: aspeed: wedge100: Use common dtsi
ARM: dts: aspeed: wedge40: Use common dtsi
ARM: dts: aspeed: Common dtsi for Facebook AST2400 Network BMCs
ARM: dts: aspeed: amd-ethanolx: Add GPIO line names
ARM: dts: aspeed: amd-ethanolx: Enable devices for the iKVM functionality
ARM: dts: aspeed: amd-ethanolx: Enable KCS channel 3
ARM: dts: aspeed: tiogapass: Remove vuart
ARM: dts: Fix label address for 64MiB OpenBMC flash layout
ARM: dts: aspeed: g220a: Add some gpios
...
Link: https://lore.kernel.org/r/CACPK8Xfd7AmuEaUdFfYLu4ktcrpTnYUgwQSxUbC-McB02hvo_g@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add the specific compat string for the smpctrl registers to the
SSD201/SSD202D common dtsi.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20201201134330.3037007-10-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add the smpctrl registers to the infinity2m dtsi so that the
second CPU can be enabled on chips in this family.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20201201134330.3037007-9-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add a dts for the Honestar ssd201htv2 devkit.
This is for the board populated with a SSD202D.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20201201134330.3037007-8-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add a chip level dtsi for the SigmaStar SSD202D
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20201201134330.3037007-7-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The SSD201 and SSD202D are basically the same chip with a different DDR die
packaged (64MB DDR2 or 128MB DDR3).
This patch adds a shared dtsi for the common parts of these chips like
gpio, pinctrl etc.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20201201134330.3037007-6-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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