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-rw-r--r--include/linux/platform_data/spi-davinci.h73
-rw-r--r--include/linux/spi/offload/types.h9
-rw-r--r--include/trace/events/spi-mem.h106
3 files changed, 115 insertions, 73 deletions
diff --git a/include/linux/platform_data/spi-davinci.h b/include/linux/platform_data/spi-davinci.h
deleted file mode 100644
index 2cb5cc70fd9d..000000000000
--- a/include/linux/platform_data/spi-davinci.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright 2009 Texas Instruments.
- */
-
-#ifndef __ARCH_ARM_DAVINCI_SPI_H
-#define __ARCH_ARM_DAVINCI_SPI_H
-
-#include <linux/platform_data/edma.h>
-
-#define SPI_INTERN_CS 0xFF
-
-enum {
- SPI_VERSION_1, /* For DM355/DM365/DM6467 */
- SPI_VERSION_2, /* For DA8xx */
-};
-
-/**
- * davinci_spi_platform_data - Platform data for SPI master device on DaVinci
- *
- * @version: version of the SPI IP. Different DaVinci devices have slightly
- * varying versions of the same IP.
- * @num_chipselect: number of chipselects supported by this SPI master
- * @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt
- * controller withn the SoC. Possible values are 0 and 1.
- * @cshold_bug: set this to true if the SPI controller on your chip requires
- * a write to CSHOLD bit in between transfers (like in DM355).
- * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any
- * device on the bus.
- */
-struct davinci_spi_platform_data {
- u8 version;
- u8 num_chipselect;
- u8 intr_line;
- u8 prescaler_limit;
- bool cshold_bug;
- enum dma_event_q dma_event_q;
-};
-
-/**
- * davinci_spi_config - Per-chip-select configuration for SPI slave devices
- *
- * @wdelay: amount of delay between transmissions. Measured in number of
- * SPI module clocks.
- * @odd_parity: polarity of parity flag at the end of transmit data stream.
- * 0 - odd parity, 1 - even parity.
- * @parity_enable: enable transmission of parity at end of each transmit
- * data stream.
- * @io_type: type of IO transfer. Choose between polled, interrupt and DMA.
- * @timer_disable: disable chip-select timers (setup and hold)
- * @c2tdelay: chip-select setup time. Measured in number of SPI module clocks.
- * @t2cdelay: chip-select hold time. Measured in number of SPI module clocks.
- * @t2edelay: transmit data finished to SPI ENAn pin inactive time. Measured
- * in number of SPI clocks.
- * @c2edelay: chip-select active to SPI ENAn signal active time. Measured in
- * number of SPI clocks.
- */
-struct davinci_spi_config {
- u8 wdelay;
- u8 odd_parity;
- u8 parity_enable;
-#define SPI_IO_TYPE_INTR 0
-#define SPI_IO_TYPE_POLL 1
-#define SPI_IO_TYPE_DMA 2
- u8 io_type;
- u8 timer_disable;
- u8 c2tdelay;
- u8 t2cdelay;
- u8 t2edelay;
- u8 c2edelay;
-};
-
-#endif /* __ARCH_ARM_DAVINCI_SPI_H */
diff --git a/include/linux/spi/offload/types.h b/include/linux/spi/offload/types.h
index 6f7892347871..cd61f8adb7a5 100644
--- a/include/linux/spi/offload/types.h
+++ b/include/linux/spi/offload/types.h
@@ -57,8 +57,17 @@ enum spi_offload_trigger_type {
SPI_OFFLOAD_TRIGGER_PERIODIC,
};
+/**
+ * spi_offload_trigger_periodic - configuration parameters for periodic triggers
+ * @frequency_hz: The rate that the trigger should fire in Hz.
+ * @offset_ns: A delay in nanoseconds between when this trigger fires
+ * compared to another trigger. This requires specialized hardware
+ * that supports such synchronization with a delay between two or
+ * more triggers. Set to 0 when not needed.
+ */
struct spi_offload_trigger_periodic {
u64 frequency_hz;
+ u64 offset_ns;
};
struct spi_offload_trigger_config {
diff --git a/include/trace/events/spi-mem.h b/include/trace/events/spi-mem.h
new file mode 100644
index 000000000000..d13f0bcff5e7
--- /dev/null
+++ b/include/trace/events/spi-mem.h
@@ -0,0 +1,106 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM spi-mem
+
+#undef TRACE_SYSTEM_VAR
+#define TRACE_SYSTEM_VAR spi_mem
+
+#if !defined(_TRACE_SPI_MEM_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_SPI_MEM_H
+
+#include <linux/tracepoint.h>
+#include <linux/spi/spi-mem.h>
+
+#define decode_dtr(dtr) \
+ __print_symbolic(dtr, \
+ { 0, "S" }, \
+ { 1, "D" })
+
+TRACE_EVENT(spi_mem_start_op,
+ TP_PROTO(struct spi_mem *mem, const struct spi_mem_op *op),
+ TP_ARGS(mem, op),
+
+ TP_STRUCT__entry(
+ __string(name, mem->name)
+ __dynamic_array(u8, op, 1 + op->addr.nbytes + op->dummy.nbytes)
+ __dynamic_array(u8, data, op->data.dir == SPI_MEM_DATA_OUT ?
+ min(op->data.nbytes, 64) : 0)
+ __field(u32, data_len)
+ __field(u32, max_freq)
+ __field(u8, cmd_buswidth)
+ __field(bool, cmd_dtr)
+ __field(u8, addr_buswidth)
+ __field(bool, addr_dtr)
+ __field(u8, dummy_nbytes)
+ __field(u8, data_buswidth)
+ __field(bool, data_dtr)
+ ),
+
+ TP_fast_assign(
+ int i;
+
+ __assign_str(name);
+ __entry->max_freq = op->max_freq ?: mem->spi->max_speed_hz;
+
+ __entry->cmd_buswidth = op->cmd.buswidth;
+ __entry->cmd_dtr = op->cmd.dtr;
+ *((u8 *)__get_dynamic_array(op)) = op->cmd.opcode;
+
+ __entry->addr_buswidth = op->addr.buswidth;
+ __entry->addr_dtr = op->addr.dtr;
+ for (i = 0; i < op->addr.nbytes; i++)
+ ((u8 *)__get_dynamic_array(op))[i + 1] =
+ op->addr.val >> (8 * (op->addr.nbytes - i - 1));
+
+ memset(((u8 *)__get_dynamic_array(op)) + op->addr.nbytes + 1,
+ 0xff, op->dummy.nbytes);
+
+ __entry->data_len = op->data.nbytes;
+ __entry->data_buswidth = op->data.buswidth;
+ __entry->data_dtr = op->data.dtr;
+ if (op->data.dir == SPI_MEM_DATA_OUT)
+ memcpy(__get_dynamic_array(data), op->data.buf.out,
+ __get_dynamic_array_len(data));
+ ),
+
+ TP_printk("%s %u%s-%u%s-%u%s @%u Hz op=[%*phD] len=%u tx=[%*phD]",
+ __get_str(name),
+ __entry->cmd_buswidth, decode_dtr(__entry->cmd_dtr),
+ __entry->addr_buswidth, decode_dtr(__entry->addr_dtr),
+ __entry->data_buswidth, decode_dtr(__entry->data_dtr),
+ __entry->max_freq,
+ __get_dynamic_array_len(op), __get_dynamic_array(op),
+ __entry->data_len,
+ __get_dynamic_array_len(data), __get_dynamic_array(data))
+);
+
+TRACE_EVENT(spi_mem_stop_op,
+ TP_PROTO(struct spi_mem *mem, const struct spi_mem_op *op),
+ TP_ARGS(mem, op),
+
+ TP_STRUCT__entry(
+ __string(name, mem->name)
+ __dynamic_array(u8, data, op->data.dir == SPI_MEM_DATA_IN ?
+ min(op->data.nbytes, 64) : 0)
+ __field(u32, data_len)
+ ),
+
+ TP_fast_assign(
+ __assign_str(name);
+ __entry->data_len = op->data.nbytes;
+ if (op->data.dir == SPI_MEM_DATA_IN)
+ memcpy(__get_dynamic_array(data), op->data.buf.in,
+ __get_dynamic_array_len(data));
+ ),
+
+ TP_printk("%s len=%u rx=[%*phD]",
+ __get_str(name),
+ __entry->data_len,
+ __get_dynamic_array_len(data), __get_dynamic_array(data))
+);
+
+
+#endif /* _TRACE_SPI_MEM_H */
+
+/* This part must be outside protection */
+#include <trace/define_trace.h>