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path: root/drivers/pinctrl/pinctrl-equilibrium.c
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Diffstat (limited to 'drivers/pinctrl/pinctrl-equilibrium.c')
-rw-r--r--drivers/pinctrl/pinctrl-equilibrium.c39
1 files changed, 22 insertions, 17 deletions
diff --git a/drivers/pinctrl/pinctrl-equilibrium.c b/drivers/pinctrl/pinctrl-equilibrium.c
index 3a9a0f059090..2d04829b29c9 100644
--- a/drivers/pinctrl/pinctrl-equilibrium.c
+++ b/drivers/pinctrl/pinctrl-equilibrium.c
@@ -2,6 +2,7 @@
/* Copyright (C) 2019 Intel Corporation */
#include <linux/gpio/driver.h>
+#include <linux/gpio/generic.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
@@ -179,9 +180,11 @@ static int gpiochip_setup(struct device *dev, struct eqbr_gpio_ctrl *gctrl)
struct gpio_irq_chip *girq;
struct gpio_chip *gc;
- gc = &gctrl->chip;
+ gc = &gctrl->chip.gc;
gc->label = gctrl->name;
gc->fwnode = gctrl->fwnode;
+ gc->request = gpiochip_generic_request;
+ gc->free = gpiochip_generic_free;
if (!fwnode_property_read_bool(gctrl->fwnode, "interrupt-controller")) {
dev_dbg(dev, "gc %s: doesn't act as interrupt controller!\n",
@@ -189,7 +192,7 @@ static int gpiochip_setup(struct device *dev, struct eqbr_gpio_ctrl *gctrl)
return 0;
}
- girq = &gctrl->chip.irq;
+ girq = &gctrl->chip.gc.irq;
gpio_irq_chip_set_chip(girq, &eqbr_irq_chip);
girq->parent_handler = eqbr_irq_handler;
girq->num_parents = 1;
@@ -206,6 +209,7 @@ static int gpiochip_setup(struct device *dev, struct eqbr_gpio_ctrl *gctrl)
static int gpiolib_reg(struct eqbr_pinctrl_drv_data *drvdata)
{
+ struct gpio_generic_chip_config config;
struct device *dev = drvdata->dev;
struct eqbr_gpio_ctrl *gctrl;
struct device_node *np;
@@ -237,12 +241,16 @@ static int gpiolib_reg(struct eqbr_pinctrl_drv_data *drvdata)
}
raw_spin_lock_init(&gctrl->lock);
- ret = bgpio_init(&gctrl->chip, dev, gctrl->bank->nr_pins / 8,
- gctrl->membase + GPIO_IN,
- gctrl->membase + GPIO_OUTSET,
- gctrl->membase + GPIO_OUTCLR,
- gctrl->membase + GPIO_DIR,
- NULL, 0);
+ config = (struct gpio_generic_chip_config) {
+ .dev = dev,
+ .sz = gctrl->bank->nr_pins / 8,
+ .dat = gctrl->membase + GPIO_IN,
+ .set = gctrl->membase + GPIO_OUTSET,
+ .clr = gctrl->membase + GPIO_OUTCLR,
+ .dirout = gctrl->membase + GPIO_DIR,
+ };
+
+ ret = gpio_generic_chip_init(&gctrl->chip, &config);
if (ret) {
dev_err(dev, "unable to init generic GPIO\n");
return ret;
@@ -252,7 +260,7 @@ static int gpiolib_reg(struct eqbr_pinctrl_drv_data *drvdata)
if (ret)
return ret;
- ret = devm_gpiochip_add_data(dev, &gctrl->chip, gctrl);
+ ret = devm_gpiochip_add_data(dev, &gctrl->chip.gc, gctrl);
if (ret)
return ret;
}
@@ -317,7 +325,7 @@ static int eqbr_pinmux_set_mux(struct pinctrl_dev *pctldev,
unsigned int selector, unsigned int group)
{
struct eqbr_pinctrl_drv_data *pctl = pinctrl_dev_get_drvdata(pctldev);
- struct function_desc *func;
+ const struct function_desc *func;
struct group_desc *grp;
unsigned int *pinmux;
int i;
@@ -437,7 +445,7 @@ static int eqbr_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
}
raw_spin_unlock_irqrestore(&pctl->lock, flags);
*config = pinconf_to_config_packed(param, val);
-;
+
return 0;
}
@@ -497,7 +505,7 @@ static int eqbr_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
bank->pin_base, pin);
return -ENODEV;
}
- gc = &gctrl->chip;
+ gc = &gctrl->chip.gc;
gc->direction_output(gc, offset, 0);
continue;
default:
@@ -685,11 +693,8 @@ static int eqbr_build_functions(struct eqbr_pinctrl_drv_data *drvdata)
if (funcs[i].name == NULL)
continue;
- ret = pinmux_generic_add_function(drvdata->pctl_dev,
- funcs[i].name,
- funcs[i].groups,
- funcs[i].ngroups,
- drvdata);
+ ret = pinmux_generic_add_pinfunction(drvdata->pctl_dev,
+ &funcs[i], drvdata);
if (ret < 0) {
dev_err(dev, "Failed to register function %s\n",
funcs[i].name);