diff options
Diffstat (limited to 'drivers/net/ethernet/amd')
| -rw-r--r-- | drivers/net/ethernet/amd/pds_core/main.c | 2 | ||||
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/Makefile | 2 | ||||
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe-common.h | 40 | ||||
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 142 | ||||
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe-drv.c | 219 | ||||
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c | 30 | ||||
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c | 401 | ||||
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe-i2c.c | 2 | ||||
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe-main.c | 2 | ||||
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe-pci.c | 2 | ||||
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 2 | ||||
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe-pps.c | 74 | ||||
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe-ptp.c | 101 | ||||
| -rw-r--r-- | drivers/net/ethernet/amd/xgbe/xgbe.h | 66 |
14 files changed, 692 insertions, 393 deletions
diff --git a/drivers/net/ethernet/amd/pds_core/main.c b/drivers/net/ethernet/amd/pds_core/main.c index 9b81e1c260c2..c7a2eff57632 100644 --- a/drivers/net/ethernet/amd/pds_core/main.c +++ b/drivers/net/ethernet/amd/pds_core/main.c @@ -280,7 +280,7 @@ static int pdsc_init_pf(struct pdsc *pdsc) goto err_out_del_dev; } - hr = devl_health_reporter_create(dl, &pdsc_fw_reporter_ops, 0, pdsc); + hr = devl_health_reporter_create(dl, &pdsc_fw_reporter_ops, pdsc); if (IS_ERR(hr)) { devl_unlock(dl); dev_warn(pdsc->dev, "Failed to create fw reporter: %pe\n", hr); diff --git a/drivers/net/ethernet/amd/xgbe/Makefile b/drivers/net/ethernet/amd/xgbe/Makefile index 620785ffbd51..980e27652237 100644 --- a/drivers/net/ethernet/amd/xgbe/Makefile +++ b/drivers/net/ethernet/amd/xgbe/Makefile @@ -3,7 +3,7 @@ obj-$(CONFIG_AMD_XGBE) += amd-xgbe.o amd-xgbe-objs := xgbe-main.o xgbe-drv.o xgbe-dev.o \ xgbe-desc.o xgbe-ethtool.o xgbe-mdio.o \ - xgbe-ptp.o \ + xgbe-hwtstamp.o xgbe-ptp.o xgbe-pps.o \ xgbe-i2c.o xgbe-phy-v1.o xgbe-phy-v2.o \ xgbe-platform.o diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-common.h b/drivers/net/ethernet/amd/xgbe/xgbe-common.h index 9316de4126cf..62b01de93db4 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-common.h +++ b/drivers/net/ethernet/amd/xgbe/xgbe-common.h @@ -223,7 +223,15 @@ #define MAC_TSSR 0x0d20 #define MAC_TXSNR 0x0d30 #define MAC_TXSSR 0x0d34 - +#define MAC_TICNR 0x0d58 +#define MAC_TICSNR 0x0d5C +#define MAC_TECNR 0x0d60 +#define MAC_TECSNR 0x0d64 +#define MAC_PPSCR 0x0d70 +#define MAC_PPS0_TTSR 0x0d80 +#define MAC_PPS0_TTNSR 0x0d84 +#define MAC_PPS0_INTERVAL 0x0d88 +#define MAC_PPS0_WIDTH 0x0d8C #define MAC_QTFCR_INC 4 #define MAC_MACA_INC 4 #define MAC_HTR_INC 4 @@ -231,6 +239,18 @@ #define MAC_RQC2_INC 4 #define MAC_RQC2_Q_PER_REG 4 +/* PPS helpers */ +#define PPSEN0 BIT(4) +#define MAC_PPSx_TTSR(x) ((MAC_PPS0_TTSR) + ((x) * 0x10)) +#define MAC_PPSx_TTNSR(x) ((MAC_PPS0_TTNSR) + ((x) * 0x10)) +#define MAC_PPSx_INTERVAL(x) ((MAC_PPS0_INTERVAL) + ((x) * 0x10)) +#define MAC_PPSx_WIDTH(x) ((MAC_PPS0_WIDTH) + ((x) * 0x10)) +#define PPS_MAXIDX(x) ((((x) + 1) * 8) - 1) +#define PPS_MINIDX(x) ((x) * 8) +#define XGBE_PPSCMD_STOP 0x5 +#define XGBE_PPSCMD_START 0x2 +#define XGBE_PPSTARGET_PULSE 0x2 + /* MAC register entry bit positions and sizes */ #define MAC_HWF0R_ADDMACADRSEL_INDEX 18 #define MAC_HWF0R_ADDMACADRSEL_WIDTH 5 @@ -364,6 +384,10 @@ #define MAC_RCR_CST_WIDTH 1 #define MAC_RCR_DCRCC_INDEX 3 #define MAC_RCR_DCRCC_WIDTH 1 +#define MAC_RCR_GPSLCE_INDEX 6 +#define MAC_RCR_GPSLCE_WIDTH 1 +#define MAC_RCR_WD_INDEX 7 +#define MAC_RCR_WD_WIDTH 1 #define MAC_RCR_HDSMS_INDEX 12 #define MAC_RCR_HDSMS_WIDTH 3 #define MAC_RCR_IPC_INDEX 9 @@ -374,6 +398,8 @@ #define MAC_RCR_LM_WIDTH 1 #define MAC_RCR_RE_INDEX 0 #define MAC_RCR_RE_WIDTH 1 +#define MAC_RCR_GPSL_INDEX 16 +#define MAC_RCR_GPSL_WIDTH 14 #define MAC_RFCR_PFCE_INDEX 8 #define MAC_RFCR_PFCE_WIDTH 1 #define MAC_RFCR_RFE_INDEX 0 @@ -412,6 +438,8 @@ #define MAC_TCR_VNE_WIDTH 1 #define MAC_TCR_VNM_INDEX 25 #define MAC_TCR_VNM_WIDTH 1 +#define MAC_TCR_JD_INDEX 16 +#define MAC_TCR_JD_WIDTH 1 #define MAC_TIR_TNID_INDEX 0 #define MAC_TIR_TNID_WIDTH 16 #define MAC_TSCR_AV8021ASMEN_INDEX 28 @@ -420,6 +448,8 @@ #define MAC_TSCR_SNAPTYPSEL_WIDTH 2 #define MAC_TSCR_TSADDREG_INDEX 5 #define MAC_TSCR_TSADDREG_WIDTH 1 +#define MAC_TSCR_TSUPDT_INDEX 3 +#define MAC_TSCR_TSUPDT_WIDTH 1 #define MAC_TSCR_TSCFUPDT_INDEX 1 #define MAC_TSCR_TSCFUPDT_WIDTH 1 #define MAC_TSCR_TSCTRLSSR_INDEX 9 @@ -448,6 +478,10 @@ #define MAC_TSSR_TXTSC_WIDTH 1 #define MAC_TXSNR_TXTSSTSMIS_INDEX 31 #define MAC_TXSNR_TXTSSTSMIS_WIDTH 1 +#define MAC_TICSNR_TSICSNS_INDEX 8 +#define MAC_TICSNR_TSICSNS_WIDTH 8 +#define MAC_TECSNR_TSECSNS_INDEX 8 +#define MAC_TECSNR_TSECSNS_WIDTH 8 #define MAC_VLANHTR_VLHT_INDEX 0 #define MAC_VLANHTR_VLHT_WIDTH 16 #define MAC_VLANIR_VLTI_INDEX 20 @@ -478,8 +512,10 @@ #define MAC_VR_SNPSVER_WIDTH 8 #define MAC_VR_USERVER_INDEX 16 #define MAC_VR_USERVER_WIDTH 8 +#define MAC_PPSx_TTNSR_TRGTBUSY0_INDEX 31 +#define MAC_PPSx_TTNSR_TRGTBUSY0_WIDTH 1 -/* MMC register offsets */ + /* MMC register offsets */ #define MMC_CR 0x0800 #define MMC_RISR 0x0804 #define MMC_TISR 0x0808 diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c index 466b5f6e5578..e5391a2eca51 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c @@ -1558,125 +1558,6 @@ static void xgbe_rx_desc_init(struct xgbe_channel *channel) DBGPR("<--rx_desc_init\n"); } -static void xgbe_update_tstamp_addend(struct xgbe_prv_data *pdata, - unsigned int addend) -{ - unsigned int count = 10000; - - /* Set the addend register value and tell the device */ - XGMAC_IOWRITE(pdata, MAC_TSAR, addend); - XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSADDREG, 1); - - /* Wait for addend update to complete */ - while (--count && XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSADDREG)) - udelay(5); - - if (!count) - netdev_err(pdata->netdev, - "timed out updating timestamp addend register\n"); -} - -static void xgbe_set_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec, - unsigned int nsec) -{ - unsigned int count = 10000; - - /* Set the time values and tell the device */ - XGMAC_IOWRITE(pdata, MAC_STSUR, sec); - XGMAC_IOWRITE(pdata, MAC_STNUR, nsec); - XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSINIT, 1); - - /* Wait for time update to complete */ - while (--count && XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSINIT)) - udelay(5); - - if (!count) - netdev_err(pdata->netdev, "timed out initializing timestamp\n"); -} - -static u64 xgbe_get_tstamp_time(struct xgbe_prv_data *pdata) -{ - u64 nsec; - - nsec = XGMAC_IOREAD(pdata, MAC_STSR); - nsec *= NSEC_PER_SEC; - nsec += XGMAC_IOREAD(pdata, MAC_STNR); - - return nsec; -} - -static u64 xgbe_get_tx_tstamp(struct xgbe_prv_data *pdata) -{ - unsigned int tx_snr, tx_ssr; - u64 nsec; - - if (pdata->vdata->tx_tstamp_workaround) { - tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR); - tx_ssr = XGMAC_IOREAD(pdata, MAC_TXSSR); - } else { - tx_ssr = XGMAC_IOREAD(pdata, MAC_TXSSR); - tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR); - } - - if (XGMAC_GET_BITS(tx_snr, MAC_TXSNR, TXTSSTSMIS)) - return 0; - - nsec = tx_ssr; - nsec *= NSEC_PER_SEC; - nsec += tx_snr; - - return nsec; -} - -static void xgbe_get_rx_tstamp(struct xgbe_packet_data *packet, - struct xgbe_ring_desc *rdesc) -{ - u64 nsec; - - if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_CONTEXT_DESC3, TSA) && - !XGMAC_GET_BITS_LE(rdesc->desc3, RX_CONTEXT_DESC3, TSD)) { - nsec = le32_to_cpu(rdesc->desc1); - nsec <<= 32; - nsec |= le32_to_cpu(rdesc->desc0); - if (nsec != 0xffffffffffffffffULL) { - packet->rx_tstamp = nsec; - XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, - RX_TSTAMP, 1); - } - } -} - -static int xgbe_config_tstamp(struct xgbe_prv_data *pdata, - unsigned int mac_tscr) -{ - /* Set one nano-second accuracy */ - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCTRLSSR, 1); - - /* Set fine timestamp update */ - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCFUPDT, 1); - - /* Overwrite earlier timestamps */ - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TXTSSTSM, 1); - - XGMAC_IOWRITE(pdata, MAC_TSCR, mac_tscr); - - /* Exit if timestamping is not enabled */ - if (!XGMAC_GET_BITS(mac_tscr, MAC_TSCR, TSENA)) - return 0; - - /* Initialize time registers */ - XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_TSTAMP_SSINC); - XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_TSTAMP_SNSINC); - xgbe_update_tstamp_addend(pdata, pdata->tstamp_addend); - xgbe_set_tstamp_time(pdata, 0, 0); - - /* Initialize the timecounter */ - timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc, - ktime_to_ns(ktime_get_real())); - - return 0; -} - static void xgbe_tx_start_xmit(struct xgbe_channel *channel, struct xgbe_ring *ring) { @@ -2850,9 +2731,19 @@ static void xgbe_config_jumbo_enable(struct xgbe_prv_data *pdata) { unsigned int val; - val = (pdata->netdev->mtu > XGMAC_STD_PACKET_MTU) ? 1 : 0; - - XGMAC_IOWRITE_BITS(pdata, MAC_RCR, JE, val); + if (pdata->netdev->mtu > XGMAC_JUMBO_PACKET_MTU) { + XGMAC_IOWRITE_BITS(pdata, MAC_RCR, GPSL, + XGMAC_GIANT_PACKET_MTU); + XGMAC_IOWRITE_BITS(pdata, MAC_RCR, WD, 1); + XGMAC_IOWRITE_BITS(pdata, MAC_TCR, JD, 1); + XGMAC_IOWRITE_BITS(pdata, MAC_RCR, GPSLCE, 1); + } else { + val = pdata->netdev->mtu > XGMAC_STD_PACKET_MTU ? 1 : 0; + XGMAC_IOWRITE_BITS(pdata, MAC_RCR, GPSLCE, 0); + XGMAC_IOWRITE_BITS(pdata, MAC_RCR, WD, 0); + XGMAC_IOWRITE_BITS(pdata, MAC_TCR, JD, 0); + XGMAC_IOWRITE_BITS(pdata, MAC_RCR, JE, val); + } } static void xgbe_config_mac_speed(struct xgbe_prv_data *pdata) @@ -3661,13 +3552,6 @@ void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *hw_if) hw_if->rx_mmc_int = xgbe_rx_mmc_int; hw_if->read_mmc_stats = xgbe_read_mmc_stats; - /* For PTP config */ - hw_if->config_tstamp = xgbe_config_tstamp; - hw_if->update_tstamp_addend = xgbe_update_tstamp_addend; - hw_if->set_tstamp_time = xgbe_set_tstamp_time; - hw_if->get_tstamp_time = xgbe_get_tstamp_time; - hw_if->get_tx_tstamp = xgbe_get_tx_tstamp; - /* For Data Center Bridging config */ hw_if->config_tc = xgbe_config_tc; hw_if->config_dcb_tc = xgbe_config_dcb_tc; diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c index 65447f9a0a59..f0989aa01855 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c @@ -448,7 +448,7 @@ static void xgbe_isr_bh_work(struct work_struct *work) if (XGMAC_GET_BITS(mac_tssr, MAC_TSSR, TXTSC)) { /* Read Tx Timestamp to clear interrupt */ pdata->tx_tstamp = - hw_if->get_tx_tstamp(pdata); + xgbe_get_tx_tstamp(pdata); queue_work(pdata->dev_workqueue, &pdata->tx_tstamp_work); } @@ -691,6 +691,21 @@ void xgbe_get_all_hw_features(struct xgbe_prv_data *pdata) hw_feat->pps_out_num = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, PPSOUTNUM); hw_feat->aux_snap_num = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, AUXSNAPNUM); + /* Sanity check and warn if hardware reports more than supported */ + if (hw_feat->pps_out_num > XGBE_MAX_PPS_OUT) { + dev_warn(pdata->dev, + "Hardware reports %u PPS outputs, limiting to %u\n", + hw_feat->pps_out_num, XGBE_MAX_PPS_OUT); + hw_feat->pps_out_num = XGBE_MAX_PPS_OUT; + } + + if (hw_feat->aux_snap_num > XGBE_MAX_AUX_SNAP) { + dev_warn(pdata->dev, + "Hardware reports %u aux snapshot inputs, limiting to %u\n", + hw_feat->aux_snap_num, XGBE_MAX_AUX_SNAP); + hw_feat->aux_snap_num = XGBE_MAX_AUX_SNAP; + } + /* Translate the Hash Table size into actual number */ switch (hw_feat->hash_table_size) { case 0: @@ -1371,199 +1386,6 @@ static void xgbe_restart(struct work_struct *work) rtnl_unlock(); } -static void xgbe_tx_tstamp(struct work_struct *work) -{ - struct xgbe_prv_data *pdata = container_of(work, - struct xgbe_prv_data, - tx_tstamp_work); - struct skb_shared_hwtstamps hwtstamps; - u64 nsec; - unsigned long flags; - - spin_lock_irqsave(&pdata->tstamp_lock, flags); - if (!pdata->tx_tstamp_skb) - goto unlock; - - if (pdata->tx_tstamp) { - nsec = timecounter_cyc2time(&pdata->tstamp_tc, - pdata->tx_tstamp); - - memset(&hwtstamps, 0, sizeof(hwtstamps)); - hwtstamps.hwtstamp = ns_to_ktime(nsec); - skb_tstamp_tx(pdata->tx_tstamp_skb, &hwtstamps); - } - - dev_kfree_skb_any(pdata->tx_tstamp_skb); - - pdata->tx_tstamp_skb = NULL; - -unlock: - spin_unlock_irqrestore(&pdata->tstamp_lock, flags); -} - -static int xgbe_get_hwtstamp_settings(struct xgbe_prv_data *pdata, - struct ifreq *ifreq) -{ - if (copy_to_user(ifreq->ifr_data, &pdata->tstamp_config, - sizeof(pdata->tstamp_config))) - return -EFAULT; - - return 0; -} - -static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata, - struct ifreq *ifreq) -{ - struct hwtstamp_config config; - unsigned int mac_tscr; - - if (copy_from_user(&config, ifreq->ifr_data, sizeof(config))) - return -EFAULT; - - mac_tscr = 0; - - switch (config.tx_type) { - case HWTSTAMP_TX_OFF: - break; - - case HWTSTAMP_TX_ON: - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); - break; - - default: - return -ERANGE; - } - - switch (config.rx_filter) { - case HWTSTAMP_FILTER_NONE: - break; - - case HWTSTAMP_FILTER_NTP_ALL: - case HWTSTAMP_FILTER_ALL: - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENALL, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); - break; - - /* PTP v2, UDP, any kind of event packet */ - case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); - fallthrough; /* to PTP v1, UDP, any kind of event packet */ - case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); - break; - - /* PTP v2, UDP, Sync packet */ - case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); - fallthrough; /* to PTP v1, UDP, Sync packet */ - case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); - break; - - /* PTP v2, UDP, Delay_req packet */ - case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); - fallthrough; /* to PTP v1, UDP, Delay_req packet */ - case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); - break; - - /* 802.AS1, Ethernet, any kind of event packet */ - case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); - break; - - /* 802.AS1, Ethernet, Sync packet */ - case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); - break; - - /* 802.AS1, Ethernet, Delay_req packet */ - case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); - break; - - /* PTP v2/802.AS1, any layer, any kind of event packet */ - case HWTSTAMP_FILTER_PTP_V2_EVENT: - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); - break; - - /* PTP v2/802.AS1, any layer, Sync packet */ - case HWTSTAMP_FILTER_PTP_V2_SYNC: - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); - break; - - /* PTP v2/802.AS1, any layer, Delay_req packet */ - case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); - XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); - break; - - default: - return -ERANGE; - } - - pdata->hw_if.config_tstamp(pdata, mac_tscr); - - memcpy(&pdata->tstamp_config, &config, sizeof(config)); - - return 0; -} - -static void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata, - struct sk_buff *skb, - struct xgbe_packet_data *packet) -{ - unsigned long flags; - - if (XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP)) { - spin_lock_irqsave(&pdata->tstamp_lock, flags); - if (pdata->tx_tstamp_skb) { - /* Another timestamp in progress, ignore this one */ - XGMAC_SET_BITS(packet->attributes, - TX_PACKET_ATTRIBUTES, PTP, 0); - } else { - pdata->tx_tstamp_skb = skb_get(skb); - skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; - } - spin_unlock_irqrestore(&pdata->tstamp_lock, flags); - } - - skb_tx_timestamp(skb); -} - static void xgbe_prep_vlan(struct sk_buff *skb, struct xgbe_packet_data *packet) { if (skb_vlan_tag_present(skb)) @@ -1776,6 +1598,9 @@ static int xgbe_open(struct net_device *netdev) INIT_WORK(&pdata->stopdev_work, xgbe_stopdev); INIT_WORK(&pdata->tx_tstamp_work, xgbe_tx_tstamp); + /* Initialize PTP timestamping and clock. */ + xgbe_init_ptp(pdata); + ret = xgbe_alloc_memory(pdata); if (ret) goto err_ptpclk; @@ -2546,12 +2371,8 @@ skip_data: if (XGMAC_GET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, RX_TSTAMP)) { - u64 nsec; - - nsec = timecounter_cyc2time(&pdata->tstamp_tc, - packet->rx_tstamp); hwtstamps = skb_hwtstamps(skb); - hwtstamps->hwtstamp = ns_to_ktime(nsec); + hwtstamps->hwtstamp = ns_to_ktime(packet->rx_tstamp); } if (XGMAC_GET_BITS(packet->attributes, diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c b/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c index be0d2c7d08dc..b6e1b67a2d0e 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c @@ -329,6 +329,7 @@ static int xgbe_get_coalesce(struct net_device *netdev, ec->rx_coalesce_usecs = pdata->rx_usecs; ec->rx_max_coalesced_frames = pdata->rx_frames; + ec->tx_coalesce_usecs = pdata->tx_usecs; ec->tx_max_coalesced_frames = pdata->tx_frames; return 0; @@ -342,7 +343,8 @@ static int xgbe_set_coalesce(struct net_device *netdev, struct xgbe_prv_data *pdata = netdev_priv(netdev); struct xgbe_hw_if *hw_if = &pdata->hw_if; unsigned int rx_frames, rx_riwt, rx_usecs; - unsigned int tx_frames; + unsigned int tx_frames, tx_usecs; + unsigned int jiffy_us = jiffies_to_usecs(1); rx_riwt = hw_if->usec_to_riwt(pdata, ec->rx_coalesce_usecs); rx_usecs = ec->rx_coalesce_usecs; @@ -364,20 +366,42 @@ static int xgbe_set_coalesce(struct net_device *netdev, return -EINVAL; } + tx_usecs = ec->tx_coalesce_usecs; tx_frames = ec->tx_max_coalesced_frames; /* Check the bounds of values for Tx */ + if (!tx_usecs) { + NL_SET_ERR_MSG_FMT_MOD(extack, + "tx-usecs must not be 0"); + return -EINVAL; + } + if (tx_usecs > XGMAC_MAX_COAL_TX_TICK) { + NL_SET_ERR_MSG_FMT_MOD(extack, "tx-usecs is limited to %d usec", + XGMAC_MAX_COAL_TX_TICK); + return -EINVAL; + } if (tx_frames > pdata->tx_desc_count) { netdev_err(netdev, "tx-frames is limited to %d frames\n", pdata->tx_desc_count); return -EINVAL; } + /* Round tx-usecs to nearest multiple of jiffy granularity */ + if (tx_usecs % jiffy_us) { + tx_usecs = rounddown(tx_usecs, jiffy_us); + if (!tx_usecs) + tx_usecs = jiffy_us; + NL_SET_ERR_MSG_FMT_MOD(extack, + "tx-usecs rounded to %u usec due to jiffy granularity (%u usec)", + tx_usecs, jiffy_us); + } + pdata->rx_riwt = rx_riwt; pdata->rx_usecs = rx_usecs; pdata->rx_frames = rx_frames; hw_if->config_rx_coalesce(pdata); + pdata->tx_usecs = tx_usecs; pdata->tx_frames = tx_frames; hw_if->config_tx_coalesce(pdata); @@ -440,7 +464,7 @@ static int xgbe_set_rxfh(struct net_device *netdev, { struct xgbe_prv_data *pdata = netdev_priv(netdev); struct xgbe_hw_if *hw_if = &pdata->hw_if; - unsigned int ret; + int ret; if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE && rxfh->hfunc != ETH_RSS_HASH_TOP) { @@ -709,7 +733,7 @@ out: } static const struct ethtool_ops xgbe_ethtool_ops = { - .supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS | + .supported_coalesce_params = ETHTOOL_COALESCE_USECS | ETHTOOL_COALESCE_MAX_FRAMES, .get_drvinfo = xgbe_get_drvinfo, .get_msglevel = xgbe_get_msglevel, diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c b/drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c new file mode 100644 index 000000000000..bc52e5ec6420 --- /dev/null +++ b/drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c @@ -0,0 +1,401 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +/* + * Copyright (c) 2014-2025, Advanced Micro Devices, Inc. + * Copyright (c) 2014, Synopsys, Inc. + * All rights reserved + * + * Author: Raju Rangoju <Raju.Rangoju@amd.com> + */ + +#include "xgbe.h" +#include "xgbe-common.h" + +void xgbe_update_tstamp_time(struct xgbe_prv_data *pdata, + unsigned int sec, unsigned int nsec) +{ + int count; + + /* Set the time values and tell the device */ + XGMAC_IOWRITE(pdata, MAC_STSUR, sec); + XGMAC_IOWRITE(pdata, MAC_STNUR, nsec); + + /* issue command to update the system time value */ + XGMAC_IOWRITE(pdata, MAC_TSCR, + XGMAC_IOREAD(pdata, MAC_TSCR) | + (1 << MAC_TSCR_TSUPDT_INDEX)); + + /* Wait for the time adjust/update to complete */ + count = 10000; + while (--count && XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSUPDT)) + udelay(5); + + if (count < 0) + netdev_err(pdata->netdev, + "timed out updating system timestamp\n"); +} + +void xgbe_update_tstamp_addend(struct xgbe_prv_data *pdata, + unsigned int addend) +{ + unsigned int count = 10000; + + /* Set the addend register value and tell the device */ + XGMAC_IOWRITE(pdata, MAC_TSAR, addend); + XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSADDREG, 1); + + /* Wait for addend update to complete */ + while (--count && XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSADDREG)) + udelay(5); + + if (!count) + netdev_err(pdata->netdev, + "timed out updating timestamp addend register\n"); +} + +void xgbe_set_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec, + unsigned int nsec) +{ + unsigned int count = 10000; + + /* Set the time values and tell the device */ + XGMAC_IOWRITE(pdata, MAC_STSUR, sec); + XGMAC_IOWRITE(pdata, MAC_STNUR, nsec); + XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSINIT, 1); + + /* Wait for time update to complete */ + while (--count && XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSINIT)) + udelay(5); + + if (!count) + netdev_err(pdata->netdev, "timed out initializing timestamp\n"); +} + +u64 xgbe_get_tstamp_time(struct xgbe_prv_data *pdata) +{ + u64 nsec; + + nsec = XGMAC_IOREAD(pdata, MAC_STSR); + nsec *= NSEC_PER_SEC; + nsec += XGMAC_IOREAD(pdata, MAC_STNR); + + return nsec; +} + +u64 xgbe_get_tx_tstamp(struct xgbe_prv_data *pdata) +{ + unsigned int tx_snr, tx_ssr; + u64 nsec; + + if (pdata->vdata->tx_tstamp_workaround) { + tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR); + tx_ssr = XGMAC_IOREAD(pdata, MAC_TXSSR); + } else { + tx_ssr = XGMAC_IOREAD(pdata, MAC_TXSSR); + tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR); + } + + if (XGMAC_GET_BITS(tx_snr, MAC_TXSNR, TXTSSTSMIS)) + return 0; + + nsec = tx_ssr; + nsec *= NSEC_PER_SEC; + nsec += tx_snr; + + return nsec; +} + +void xgbe_get_rx_tstamp(struct xgbe_packet_data *packet, + struct xgbe_ring_desc *rdesc) +{ + u64 nsec; + + if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_CONTEXT_DESC3, TSA) && + !XGMAC_GET_BITS_LE(rdesc->desc3, RX_CONTEXT_DESC3, TSD)) { + nsec = le32_to_cpu(rdesc->desc1); + nsec *= NSEC_PER_SEC; + nsec += le32_to_cpu(rdesc->desc0); + if (nsec != 0xffffffffffffffffULL) { + packet->rx_tstamp = nsec; + XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, + RX_TSTAMP, 1); + } + } +} + +void xgbe_config_tstamp(struct xgbe_prv_data *pdata, unsigned int mac_tscr) +{ + unsigned int value = 0; + + value = XGMAC_IOREAD(pdata, MAC_TSCR); + value |= mac_tscr; + XGMAC_IOWRITE(pdata, MAC_TSCR, value); +} + +void xgbe_tx_tstamp(struct work_struct *work) +{ + struct xgbe_prv_data *pdata = container_of(work, + struct xgbe_prv_data, + tx_tstamp_work); + struct skb_shared_hwtstamps hwtstamps; + unsigned long flags; + + spin_lock_irqsave(&pdata->tstamp_lock, flags); + if (!pdata->tx_tstamp_skb) + goto unlock; + + if (pdata->tx_tstamp) { + memset(&hwtstamps, 0, sizeof(hwtstamps)); + hwtstamps.hwtstamp = ns_to_ktime(pdata->tx_tstamp); + skb_tstamp_tx(pdata->tx_tstamp_skb, &hwtstamps); + } + + dev_kfree_skb_any(pdata->tx_tstamp_skb); + + pdata->tx_tstamp_skb = NULL; + +unlock: + spin_unlock_irqrestore(&pdata->tstamp_lock, flags); +} + +int xgbe_get_hwtstamp_settings(struct xgbe_prv_data *pdata, struct ifreq *ifreq) +{ + if (copy_to_user(ifreq->ifr_data, &pdata->tstamp_config, + sizeof(pdata->tstamp_config))) + return -EFAULT; + + return 0; +} + +int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata, struct ifreq *ifreq) +{ + struct hwtstamp_config config; + unsigned int mac_tscr; + + if (copy_from_user(&config, ifreq->ifr_data, sizeof(config))) + return -EFAULT; + + mac_tscr = 0; + + switch (config.tx_type) { + case HWTSTAMP_TX_OFF: + break; + + case HWTSTAMP_TX_ON: + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); + break; + + default: + return -ERANGE; + } + + switch (config.rx_filter) { + case HWTSTAMP_FILTER_NONE: + break; + + case HWTSTAMP_FILTER_NTP_ALL: + case HWTSTAMP_FILTER_ALL: + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENALL, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); + break; + + /* PTP v2, UDP, any kind of event packet */ + case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); + fallthrough; /* to PTP v1, UDP, any kind of event packet */ + case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); + break; + /* PTP v2, UDP, Sync packet */ + case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); + fallthrough; /* to PTP v1, UDP, Sync packet */ + case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); + break; + + /* PTP v2, UDP, Delay_req packet */ + case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); + fallthrough; /* to PTP v1, UDP, Delay_req packet */ + case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); + break; + + /* 802.AS1, Ethernet, any kind of event packet */ + case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); + break; + + /* 802.AS1, Ethernet, Sync packet */ + case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); + break; + + /* 802.AS1, Ethernet, Delay_req packet */ + case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); + break; + + /* PTP v2/802.AS1, any layer, any kind of event packet */ + case HWTSTAMP_FILTER_PTP_V2_EVENT: + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); + break; + + /* PTP v2/802.AS1, any layer, Sync packet */ + case HWTSTAMP_FILTER_PTP_V2_SYNC: + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); + break; + + /* PTP v2/802.AS1, any layer, Delay_req packet */ + case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); + break; + + default: + return -ERANGE; + } + + xgbe_config_tstamp(pdata, mac_tscr); + + memcpy(&pdata->tstamp_config, &config, sizeof(config)); + + return 0; +} + +void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata, + struct sk_buff *skb, + struct xgbe_packet_data *packet) +{ + unsigned long flags; + + if (XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP)) { + spin_lock_irqsave(&pdata->tstamp_lock, flags); + if (pdata->tx_tstamp_skb) { + /* Another timestamp in progress, ignore this one */ + XGMAC_SET_BITS(packet->attributes, + TX_PACKET_ATTRIBUTES, PTP, 0); + } else { + pdata->tx_tstamp_skb = skb_get(skb); + skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; + } + spin_unlock_irqrestore(&pdata->tstamp_lock, flags); + } + + skb_tx_timestamp(skb); +} + +int xgbe_init_ptp(struct xgbe_prv_data *pdata) +{ + unsigned int mac_tscr = 0; + struct timespec64 now; + u64 dividend; + + /* Register Settings to be done based on the link speed. */ + switch (pdata->phy.speed) { + case SPEED_1000: + XGMAC_IOWRITE(pdata, MAC_TICNR, MAC_TICNR_1G_INITVAL); + XGMAC_IOWRITE(pdata, MAC_TECNR, MAC_TECNR_1G_INITVAL); + break; + case SPEED_2500: + case SPEED_10000: + XGMAC_IOWRITE_BITS(pdata, MAC_TICSNR, TSICSNS, + MAC_TICSNR_10G_INITVAL); + XGMAC_IOWRITE(pdata, MAC_TECNR, MAC_TECNR_10G_INITVAL); + XGMAC_IOWRITE_BITS(pdata, MAC_TECSNR, TSECSNS, + MAC_TECSNR_10G_INITVAL); + break; + case SPEED_UNKNOWN: + default: + break; + } + + /* Enable IEEE1588 PTP clock. */ + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); + + /* Overwrite earlier timestamps */ + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TXTSSTSM, 1); + + /* Set one nano-second accuracy */ + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCTRLSSR, 1); + + /* Set fine timestamp update */ + XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCFUPDT, 1); + + xgbe_config_tstamp(pdata, mac_tscr); + + /* Exit if timestamping is not enabled */ + if (!XGMAC_GET_BITS(mac_tscr, MAC_TSCR, TSENA)) + return -EOPNOTSUPP; + + if (pdata->vdata->tstamp_ptp_clock_freq) { + /* Initialize time registers based on + * 125MHz PTP Clock Frequency + */ + XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, + XGBE_V2_TSTAMP_SSINC); + XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, + XGBE_V2_TSTAMP_SNSINC); + } else { + /* Initialize time registers based on + * 50MHz PTP Clock Frequency + */ + XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_TSTAMP_SSINC); + XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_TSTAMP_SNSINC); + } + + /* Calculate the addend: + * addend = 2^32 / (PTP ref clock / (PTP clock based on SSINC)) + * = (2^32 * (PTP clock based on SSINC)) / PTP ref clock + */ + if (pdata->vdata->tstamp_ptp_clock_freq) + dividend = XGBE_V2_PTP_ACT_CLK_FREQ; + else + dividend = XGBE_PTP_ACT_CLK_FREQ; + + dividend = (u64)(dividend << 32); + pdata->tstamp_addend = div_u64(dividend, pdata->ptpclk_rate); + + xgbe_update_tstamp_addend(pdata, pdata->tstamp_addend); + + dma_wmb(); + /* initialize system time */ + ktime_get_real_ts64(&now); + + /* lower 32 bits of tv_sec are safe until y2106 */ + xgbe_set_tstamp_time(pdata, (u32)now.tv_sec, now.tv_nsec); + + return 0; +} diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c b/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c index d40011e8ddf2..65eb7b577b65 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c @@ -70,7 +70,7 @@ static int xgbe_i2c_set_enable(struct xgbe_prv_data *pdata, bool enable) static int xgbe_i2c_disable(struct xgbe_prv_data *pdata) { - unsigned int ret; + int ret; ret = xgbe_i2c_set_enable(pdata, false); if (ret) { diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-main.c b/drivers/net/ethernet/amd/xgbe/xgbe-main.c index 4ebdd123c435..d1f0419edb23 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-main.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-main.c @@ -275,7 +275,7 @@ int xgbe_config_netdev(struct xgbe_prv_data *pdata) netdev->priv_flags |= IFF_UNICAST_FLT; netdev->min_mtu = 0; - netdev->max_mtu = XGMAC_JUMBO_PACKET_MTU; + netdev->max_mtu = XGMAC_GIANT_PACKET_MTU - XGBE_ETH_FRAME_HDR; /* Use default watchdog timeout */ netdev->watchdog_timeo = 0; diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c index 097ec5e4f261..e3e1dca9856a 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c @@ -414,6 +414,7 @@ static struct xgbe_version_data xgbe_v2a = { .tx_max_fifo_size = 229376, .rx_max_fifo_size = 229376, .tx_tstamp_workaround = 1, + .tstamp_ptp_clock_freq = 1, .ecc_support = 1, .i2c_support = 1, .irq_reissue_support = 1, @@ -430,6 +431,7 @@ static struct xgbe_version_data xgbe_v2b = { .tx_max_fifo_size = 65536, .rx_max_fifo_size = 65536, .tx_tstamp_workaround = 1, + .tstamp_ptp_clock_freq = 1, .ecc_support = 1, .i2c_support = 1, .irq_reissue_support = 1, diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c index 23c39e92e783..a56efc1bee33 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c @@ -2902,7 +2902,7 @@ static void xgbe_phy_sfp_setup(struct xgbe_prv_data *pdata) static int xgbe_phy_int_mdio_reset(struct xgbe_prv_data *pdata) { struct xgbe_phy_data *phy_data = pdata->phy_data; - unsigned int ret; + int ret; ret = pdata->hw_if.set_gpio(pdata, phy_data->mdio_reset_gpio); if (ret) diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pps.c b/drivers/net/ethernet/amd/xgbe/xgbe-pps.c new file mode 100644 index 000000000000..6d03ae7ab36f --- /dev/null +++ b/drivers/net/ethernet/amd/xgbe/xgbe-pps.c @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) +/* + * Copyright (c) 2014-2025, Advanced Micro Devices, Inc. + * Copyright (c) 2014, Synopsys, Inc. + * All rights reserved + * + * Author: Raju Rangoju <Raju.Rangoju@amd.com> + */ + +#include "xgbe.h" +#include "xgbe-common.h" + +static u32 get_pps_mask(unsigned int x) +{ + return GENMASK(PPS_MAXIDX(x), PPS_MINIDX(x)); +} + +static u32 get_pps_cmd(unsigned int x, u32 val) +{ + return (val & GENMASK(3, 0)) << PPS_MINIDX(x); +} + +static u32 get_target_mode_sel(unsigned int x, u32 val) +{ + return (val & GENMASK(1, 0)) << (PPS_MAXIDX(x) - 2); +} + +int xgbe_pps_config(struct xgbe_prv_data *pdata, + struct xgbe_pps_config *cfg, int index, bool on) +{ + unsigned int ppscr = 0; + unsigned int tnsec; + u64 period; + + /* Check if target time register is busy */ + tnsec = XGMAC_IOREAD(pdata, MAC_PPSx_TTNSR(index)); + if (XGMAC_GET_BITS(tnsec, MAC_PPSx_TTNSR, TRGTBUSY0)) + return -EBUSY; + + ppscr = XGMAC_IOREAD(pdata, MAC_PPSCR); + ppscr &= ~get_pps_mask(index); + + if (!on) { + /* Disable PPS output */ + ppscr |= get_pps_cmd(index, XGBE_PPSCMD_STOP); + ppscr |= PPSEN0; + XGMAC_IOWRITE(pdata, MAC_PPSCR, ppscr); + + return 0; + } + + /* Configure start time */ + XGMAC_IOWRITE(pdata, MAC_PPSx_TTSR(index), cfg->start.tv_sec); + XGMAC_IOWRITE(pdata, MAC_PPSx_TTNSR(index), cfg->start.tv_nsec); + + period = cfg->period.tv_sec * NSEC_PER_SEC + cfg->period.tv_nsec; + period = div_u64(period, XGBE_V2_TSTAMP_SSINC); + + if (period < 4) + return -EINVAL; + + /* Configure interval and pulse width (50% duty cycle) */ + XGMAC_IOWRITE(pdata, MAC_PPSx_INTERVAL(index), period - 1); + XGMAC_IOWRITE(pdata, MAC_PPSx_WIDTH(index), (period >> 1) - 1); + + /* Enable PPS with pulse train mode */ + ppscr |= get_pps_cmd(index, XGBE_PPSCMD_START); + ppscr |= get_target_mode_sel(index, XGBE_PPSTARGET_PULSE); + ppscr |= PPSEN0; + + XGMAC_IOWRITE(pdata, MAC_PPSCR, ppscr); + + return 0; +} diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c b/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c index 978c4dd01fa0..0e0b8ec3b504 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c @@ -13,18 +13,6 @@ #include "xgbe.h" #include "xgbe-common.h" -static u64 xgbe_cc_read(const struct cyclecounter *cc) -{ - struct xgbe_prv_data *pdata = container_of(cc, - struct xgbe_prv_data, - tstamp_cc); - u64 nsec; - - nsec = pdata->hw_if.get_tstamp_time(pdata); - - return nsec; -} - static int xgbe_adjfine(struct ptp_clock_info *info, long scaled_ppm) { struct xgbe_prv_data *pdata = container_of(info, @@ -37,7 +25,7 @@ static int xgbe_adjfine(struct ptp_clock_info *info, long scaled_ppm) spin_lock_irqsave(&pdata->tstamp_lock, flags); - pdata->hw_if.update_tstamp_addend(pdata, addend); + xgbe_update_tstamp_addend(pdata, addend); spin_unlock_irqrestore(&pdata->tstamp_lock, flags); @@ -49,16 +37,39 @@ static int xgbe_adjtime(struct ptp_clock_info *info, s64 delta) struct xgbe_prv_data *pdata = container_of(info, struct xgbe_prv_data, ptp_clock_info); + unsigned int neg_adjust = 0; + unsigned int sec, nsec; + u32 quotient, reminder; unsigned long flags; + if (delta < 0) { + neg_adjust = 1; + delta = -delta; + } + + quotient = div_u64_rem(delta, 1000000000ULL, &reminder); + sec = quotient; + nsec = reminder; + + /* Negative adjustment for Hw timer register. */ + if (neg_adjust) { + sec = -sec; + if (XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSCTRLSSR)) + nsec = (1000000000UL - nsec); + else + nsec = (0x80000000UL - nsec); + } + nsec = (neg_adjust << 31) | nsec; + spin_lock_irqsave(&pdata->tstamp_lock, flags); - timecounter_adjtime(&pdata->tstamp_tc, delta); + xgbe_update_tstamp_time(pdata, sec, nsec); spin_unlock_irqrestore(&pdata->tstamp_lock, flags); return 0; } -static int xgbe_gettime(struct ptp_clock_info *info, struct timespec64 *ts) +static int xgbe_gettimex(struct ptp_clock_info *info, struct timespec64 *ts, + struct ptp_system_timestamp *sts) { struct xgbe_prv_data *pdata = container_of(info, struct xgbe_prv_data, @@ -67,9 +78,9 @@ static int xgbe_gettime(struct ptp_clock_info *info, struct timespec64 *ts) u64 nsec; spin_lock_irqsave(&pdata->tstamp_lock, flags); - - nsec = timecounter_read(&pdata->tstamp_tc); - + ptp_read_system_prets(sts); + nsec = xgbe_get_tstamp_time(pdata); + ptp_read_system_postts(sts); spin_unlock_irqrestore(&pdata->tstamp_lock, flags); *ts = ns_to_timespec64(nsec); @@ -84,14 +95,9 @@ static int xgbe_settime(struct ptp_clock_info *info, struct xgbe_prv_data, ptp_clock_info); unsigned long flags; - u64 nsec; - - nsec = timespec64_to_ns(ts); spin_lock_irqsave(&pdata->tstamp_lock, flags); - - timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc, nsec); - + xgbe_set_tstamp_time(pdata, ts->tv_sec, ts->tv_nsec); spin_unlock_irqrestore(&pdata->tstamp_lock, flags); return 0; @@ -100,15 +106,35 @@ static int xgbe_settime(struct ptp_clock_info *info, static int xgbe_enable(struct ptp_clock_info *info, struct ptp_clock_request *request, int on) { - return -EOPNOTSUPP; + struct xgbe_prv_data *pdata = container_of(info, struct xgbe_prv_data, + ptp_clock_info); + struct xgbe_pps_config *pps_cfg; + unsigned long flags; + int ret; + + dev_dbg(pdata->dev, "rq->type %d on %d\n", request->type, on); + + if (request->type != PTP_CLK_REQ_PEROUT) + return -EOPNOTSUPP; + + pps_cfg = &pdata->pps[request->perout.index]; + + pps_cfg->start.tv_sec = request->perout.start.sec; + pps_cfg->start.tv_nsec = request->perout.start.nsec; + pps_cfg->period.tv_sec = request->perout.period.sec; + pps_cfg->period.tv_nsec = request->perout.period.nsec; + + spin_lock_irqsave(&pdata->tstamp_lock, flags); + ret = xgbe_pps_config(pdata, pps_cfg, request->perout.index, on); + spin_unlock_irqrestore(&pdata->tstamp_lock, flags); + + return ret; } void xgbe_ptp_register(struct xgbe_prv_data *pdata) { struct ptp_clock_info *info = &pdata->ptp_clock_info; struct ptp_clock *clock; - struct cyclecounter *cc = &pdata->tstamp_cc; - u64 dividend; snprintf(info->name, sizeof(info->name), "%s", netdev_name(pdata->netdev)); @@ -116,8 +142,10 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata) info->max_adj = pdata->ptpclk_rate; info->adjfine = xgbe_adjfine; info->adjtime = xgbe_adjtime; - info->gettime64 = xgbe_gettime; + info->gettimex64 = xgbe_gettimex; info->settime64 = xgbe_settime; + info->n_per_out = pdata->hw_feat.pps_out_num; + info->n_ext_ts = pdata->hw_feat.aux_snap_num; info->enable = xgbe_enable; clock = ptp_clock_register(info, pdata->dev); @@ -128,23 +156,6 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata) pdata->ptp_clock = clock; - /* Calculate the addend: - * addend = 2^32 / (PTP ref clock / 50Mhz) - * = (2^32 * 50Mhz) / PTP ref clock - */ - dividend = 50000000; - dividend <<= 32; - pdata->tstamp_addend = div_u64(dividend, pdata->ptpclk_rate); - - /* Setup the timecounter */ - cc->read = xgbe_cc_read; - cc->mask = CLOCKSOURCE_MASK(64); - cc->mult = 1; - cc->shift = 0; - - timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc, - ktime_to_ns(ktime_get_real())); - /* Disable all timestamping to start */ XGMAC_IOWRITE(pdata, MAC_TSCR, 0); pdata->tstamp_config.tx_type = HWTSTAMP_TX_OFF; diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h index 057379cd43ba..e8bbb6805901 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe.h +++ b/drivers/net/ethernet/amd/xgbe/xgbe.h @@ -80,11 +80,13 @@ #define XGBE_IRQ_MODE_EDGE 0 #define XGBE_IRQ_MODE_LEVEL 1 +#define XGBE_ETH_FRAME_HDR (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN) #define XGMAC_MIN_PACKET 60 #define XGMAC_STD_PACKET_MTU 1500 #define XGMAC_MAX_STD_PACKET 1518 #define XGMAC_JUMBO_PACKET_MTU 9000 #define XGMAC_MAX_JUMBO_PACKET 9018 +#define XGMAC_GIANT_PACKET_MTU 16368 #define XGMAC_ETH_PREAMBLE (12 + 8) /* Inter-frame gap + preamble */ #define XGMAC_PFC_DATA_LEN 46 @@ -117,6 +119,14 @@ #define XGBE_MSI_BASE_COUNT 4 #define XGBE_MSI_MIN_COUNT (XGBE_MSI_BASE_COUNT + 1) +/* Initial PTP register values based on Link Speed. */ +#define MAC_TICNR_1G_INITVAL 0x10 +#define MAC_TECNR_1G_INITVAL 0x28 + +#define MAC_TICSNR_10G_INITVAL 0x33 +#define MAC_TECNR_10G_INITVAL 0x14 +#define MAC_TECSNR_10G_INITVAL 0xCC + /* PCI clock frequencies */ #define XGBE_V2_DMA_CLOCK_FREQ 500000000 /* 500 MHz */ #define XGBE_V2_PTP_CLOCK_FREQ 125000000 /* 125 MHz */ @@ -126,6 +136,15 @@ */ #define XGBE_TSTAMP_SSINC 20 #define XGBE_TSTAMP_SNSINC 0 +#define XGBE_PTP_ACT_CLK_FREQ 500000000 + +#define XGBE_V2_TSTAMP_SSINC 0xA +#define XGBE_V2_TSTAMP_SNSINC 0 +#define XGBE_V2_PTP_ACT_CLK_FREQ 1000000000 + +/* Define maximum supported values */ +#define XGBE_MAX_PPS_OUT 4 +#define XGBE_MAX_AUX_SNAP 4 /* Driver PMT macros */ #define XGMAC_DRIVER_CONTEXT 1 @@ -153,6 +172,7 @@ /* Default coalescing parameters */ #define XGMAC_INIT_DMA_TX_USECS 1000 #define XGMAC_INIT_DMA_TX_FRAMES 25 +#define XGMAC_MAX_COAL_TX_TICK 100000 #define XGMAC_MAX_DMA_RIWT 0xff #define XGMAC_INIT_DMA_RX_USECS 30 @@ -657,6 +677,11 @@ struct xgbe_ext_stats { u64 rx_vxlan_csum_errors; }; +struct xgbe_pps_config { + struct timespec64 start; + struct timespec64 period; +}; + struct xgbe_hw_if { int (*tx_complete)(struct xgbe_ring_desc *); @@ -739,14 +764,6 @@ struct xgbe_hw_if { void (*tx_mmc_int)(struct xgbe_prv_data *); void (*read_mmc_stats)(struct xgbe_prv_data *); - /* For Timestamp config */ - int (*config_tstamp)(struct xgbe_prv_data *, unsigned int); - void (*update_tstamp_addend)(struct xgbe_prv_data *, unsigned int); - void (*set_tstamp_time)(struct xgbe_prv_data *, unsigned int sec, - unsigned int nsec); - u64 (*get_tstamp_time)(struct xgbe_prv_data *); - u64 (*get_tx_tstamp)(struct xgbe_prv_data *); - /* For Data Center Bridging config */ void (*config_tc)(struct xgbe_prv_data *); void (*config_dcb_tc)(struct xgbe_prv_data *); @@ -944,6 +961,7 @@ struct xgbe_version_data { unsigned int tx_max_fifo_size; unsigned int rx_max_fifo_size; unsigned int tx_tstamp_workaround; + unsigned int tstamp_ptp_clock_freq; unsigned int ecc_support; unsigned int i2c_support; unsigned int irq_reissue_support; @@ -1129,13 +1147,14 @@ struct xgbe_prv_data { struct ptp_clock_info ptp_clock_info; struct ptp_clock *ptp_clock; struct hwtstamp_config tstamp_config; - struct cyclecounter tstamp_cc; - struct timecounter tstamp_tc; unsigned int tstamp_addend; struct work_struct tx_tstamp_work; struct sk_buff *tx_tstamp_skb; u64 tx_tstamp; + /* Pulse Per Second output */ + struct xgbe_pps_config pps[XGBE_MAX_PPS_OUT]; + /* DCB support */ struct ieee_ets *ets; struct ieee_pfc *pfc; @@ -1275,6 +1294,33 @@ void xgbe_init_tx_coalesce(struct xgbe_prv_data *); void xgbe_restart_dev(struct xgbe_prv_data *pdata); void xgbe_full_restart_dev(struct xgbe_prv_data *pdata); +/* For Timestamp config */ +void xgbe_config_tstamp(struct xgbe_prv_data *pdata, unsigned int mac_tscr); +u64 xgbe_get_tstamp_time(struct xgbe_prv_data *pdata); +u64 xgbe_get_tx_tstamp(struct xgbe_prv_data *pdata); +void xgbe_get_rx_tstamp(struct xgbe_packet_data *packet, + struct xgbe_ring_desc *rdesc); +void xgbe_get_rx_tstamp(struct xgbe_packet_data *packet, + struct xgbe_ring_desc *rdesc); +void xgbe_update_tstamp_addend(struct xgbe_prv_data *pdata, + unsigned int addend); +void xgbe_set_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec, + unsigned int nsec); +void xgbe_tx_tstamp(struct work_struct *work); +int xgbe_get_hwtstamp_settings(struct xgbe_prv_data *pdata, + struct ifreq *ifreq); +int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata, + struct ifreq *ifreq); +void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata, + struct sk_buff *skb, + struct xgbe_packet_data *packet); +int xgbe_init_ptp(struct xgbe_prv_data *pdata); +void xgbe_update_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec, + unsigned int nsec); + +int xgbe_pps_config(struct xgbe_prv_data *pdata, struct xgbe_pps_config *cfg, + int index, bool on); + #ifdef CONFIG_DEBUG_FS void xgbe_debugfs_init(struct xgbe_prv_data *); void xgbe_debugfs_exit(struct xgbe_prv_data *); |