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Diffstat (limited to 'drivers/gpu/drm/sun4i/sun8i_mixer.h')
-rw-r--r--drivers/gpu/drm/sun4i/sun8i_mixer.h14
1 files changed, 10 insertions, 4 deletions
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h
index 5b3fbee18671..85c94884fb9a 100644
--- a/drivers/gpu/drm/sun4i/sun8i_mixer.h
+++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h
@@ -141,6 +141,15 @@
#define SUN50I_MIXER_CDC0_EN 0xd0000
#define SUN50I_MIXER_CDC1_EN 0xd8000
+enum {
+ /* First mixer or second mixer with VEP support. */
+ CCSC_MIXER0_LAYOUT,
+ /* Second mixer without VEP support. */
+ CCSC_MIXER1_LAYOUT,
+ /* First mixer with the MMIO layout found in the D1 SoC. */
+ CCSC_D1_MIXER0_LAYOUT,
+};
+
/**
* struct sun8i_mixer_cfg - mixer HW configuration
* @vi_num: number of VI channels
@@ -149,10 +158,7 @@
* First, scaler supports for VI channels is defined and after that, scaler
* support for UI channels. For example, if mixer has 2 VI channels without
* scaler and 2 UI channels with scaler, bitmask would be 0xC.
- * @ccsc: select set of CCSC base addresses
- * Set value to 0 if this is first mixer or second mixer with VEP support.
- * Set value to 1 if this is second mixer without VEP support. Other values
- * are invalid.
+ * @ccsc: select set of CCSC base addresses from the enumeration above.
* @mod_rate: module clock rate that needs to be set in order to have
* a functional block.
* @is_de3: true, if this is next gen display engine 3.0, false otherwise.